• Transactions of the Korean Society for Noise and Vibration Engineering
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• v.19 no.11
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• pp.1177-1183
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• 2009

The effects of biasing magnetic fields on the performances of magnetostrictive ultrasonic transducers are investigated. The transducers are patch-type ones which are used for SHM of plate structures. Various kinds of configurations of biasing magnets are covered experimentally. It is experimentally verified that how the biasing magnetic field deploys is the most significant factors on maximizing the transducer output. From the magnetostriction curve of nickel, it is concluded qualitatively that it is not the absolute values of biasing magnetic field but the slope of magnetostriction curve to be taken account of.

• Journal of IKEEE
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• v.26 no.1
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• pp.119-123
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• 2022

This paper propose a new ESD protection device suitable for 12V class applications by adding a self-biasing structure to an ESD protection device with high holding voltage due to additional parasitic bipolar BJT. To verify the operating principle and electrical characteristics of the proposed device, current density simulation and HBM simulation were performed using Synopsys' TCAD Simulation, and the operation of the additional self-biasing structure was confirmed. As a result of the simulation, it was confirmed that the proposed ESD protection device has a higher level of holding voltage compared to the existing ESD protection device. It is expected to have high area efficiency due to the dual structure and sufficient latch-up immunity in 12V-class applications.

• ETRI Journal
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• v.35 no.2
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• pp.226-233
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• 2013

This paper presents a two-stage power-efficient class-AB operational transconductance amplifier (OTA) based on an adaptive biasing circuit suited to low-power dissipation and low-voltage operation. The OTA shows significant improvements in driving capability and power dissipation owing to the novel adaptive biasing circuit. The OTA dissipates only $0.4{\mu}W$ from a supply voltage of ${\pm}0.6V$ and exhibits excellent high driving, which results in a slew rate improvement of more than 250 times that of the conventional class-AB amplifier. The design is fabricated using $0.18-{\mu}m$ CMOS technology.

• JSTS:Journal of Semiconductor Technology and Science
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• v.5 no.3
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• pp.168-172
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• 2005

In this paper, we present a new adaptive biasing scheme for CMOS op-amps. The designed circuit has been used in an Operational Transconductance Amplifier (OTA) with ${\pm}1$ V power supply, and it has improved the positive and negative slew rates from 2.92 V/msec to 1242 V/msec and from 1.56 V/msec to 133 V/msec respectively, while maintaining all the small-signal performance parameter values the same as that without adaptive biasing (as expected), however, there was a marginal decrease of the dynamic range. The most useful features of the proposed circuit are that it uses a very low number of components (thus not creating severe area penalty) and requires only 25 nW of extra stand-by power.

• Journal of electromagnetic engineering and science
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• v.14 no.4
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• pp.376-381
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• 2014

We present a CMOS rail-to-rail class-AB amplifier using dynamic current biasing to improve the delay response of the error amplifier in a low-dropout (LDO) regulator, which is a building block for a wireless power transfer receiver. The response time of conventional error amplifiers deteriorates by slewing due to parasitic capacitance generated at the pass transistor of the LDO regulator. To enhance slewing, an error amplifier with dynamic current biasing was devised. The LDO regulator with the proposed error amplifier was fabricated in a $0.35-{\mu}m$ high-voltage BCDMOS process. We obtained an output voltage of 4 V with a range of input voltages between 4.7 V and 7 V and an output current of up to 212 mA. The settling time during line transient was measured as $9{\mu}s$ for an input variation of 4.7-6 V. In addition, an output capacitor of 100 pF was realized on chip integration.

• Journal of Multimedia Information System
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• v.8 no.2
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• pp.143-146
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• 2021

This work presents an automated transistor biasing scheme for analog integrated circuits. In order to effectively bias the transistor at a desired operating point, the proposed method uses a linearized transistor circuit model along with the curve fitted expressions obtained from the pre-simulated I-V characteristics of the actual transistor. As a result, the transistor size that leads to the desired operating point can be easily determined without heavily relying on the circuit simulator, which will lead to significant design time reduction. Furthermore, the proposed method is applied to an actual amplifier circuit where the design time based on the proposed biasing method showed 10× faster than the conventional design approach using the circuit simulator.

• Journal of Sensor Science and Technology
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• v.33 no.1
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• pp.12-17
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• 2024

Floating inverter amplifiers (FIAs) have recently garnered considerable attention owing to their high energy efficiency and inherent resilience to input common-mode voltages and process-voltage-temperature variations. Since the voltage gain of a simple FIA is low, it is typically cascaded or cascoded to achieve a higher voltage gain. However, cascading poses stability concerns in closed-loop applications, while cascoding limits the output swing. This study introduces a gain-enhanced FIA that features cross-coupled body biasing. Through simulations, it is demonstrated that the proposed FIA designed using a 28-nm complementary metal-oxide-semiconductor technology with a 1-V power supply can achieve a high voltage gain (> 90 dB) suitable for dynamic open-loop applications. The proposed FIA can also be used as a closed-loop amplifier by adjusting the amount of positive feedback due to the cross-coupled body biasing. The capability of achieving a high gain with minimum-length devices makes the proposed FIA a promising candidate for low-power, high-speed sensor interface systems.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.56 no.1
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• pp.132-138
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• 2007

Carbon nanotubes (CNTs) arc grown on Ni catalysts employing an inductively-coupled plasma chemical vapor deposition (ICP-CVD) method. The structural and field-emissive properties of the CNTs grown are characterized in terms of the substrate-bias applied. Characterization using the various techniques, such as field-omission scanning electron microscopy (FESEM), high-resolution transmission electron microscopy (HRTEM), Auger spectroscopy (AES), and Raman spectroscopy, shows that the structural properties of the CNTs, including their physical dimensions and crystal qualities, as well as the nature of vertical growth, are strongly dependent upon the application of substrate bias during CNT growth. It is for the first time observed that the provailing growth mechanism of CNTs, which is either due to tip-driven growth or based-on-catalyst growth, may be influenced by substrate biasing. It is also seen that negatively substrate-biasing would promote the vertical-alignment of the CNTs grown, compared to positively substrate-biasing. However, the CNTs grown under the positively-biased condition display a higher electron-emission capability than those grown under the negatively-biased condition or without any bias applied.

• Proceedings of the KIEE Conference
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• 2006.10a
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• pp.36-37
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• 2006

Both negative and positive substrate bias effects on the structural properties and field-emission characteristics are investigated. carbon nanotubes (CNTs) are grown on Ni catalysts employing an inductively-coupled plasma chemical vapor deposition (ICP-CVD) method. Characterization using various techniques, such as field-emission scanning electron microscopy (FESEM), high-resolution transmission electron microscopy (HRTEM), Auger spectroscopy (AES), and Raman spectroscopy, shows that the physical dimension as well as the crystal quality of CNTs grown can be changed and controlled by the application of substrate bias during CNT growth. It is for the first time observed that the prevailing growth mechanism of CNTs, which is either due to tip-driven growth or based-on-catalyst growth, may be influenced by substrate biasing. It is also seen that negative biasing would be more effectively role in the vertical-alignment of CNTs compared to positive biasing. However, the CNTs grown under the positively bias condition display much better electron emission capabilities than those grown under negative bias or without bias. The reasons for all the measured data regarding the structural properties of CNTs are discussed to confirm the correlation with the observed field-emissive properties.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.11
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• pp.1091-1097
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• 2013

This paper presents a rectifier with comparator using unbalanced body biasing in $0.11{\mu}m$ RF CMOS process. It is composed of MOSFETs and two comparators. The comparator is used to reduce reverse leakage current which occurs when the load voltage is higher than input voltage. For the comparator, unbalanced body biasing is devised. By using unbalanced body biasing, reference voltage for comparator changing from high state to low state is increased, and it reduces time interval for leakage current to flow. 13.56 MHz 2 Vpp signal is used for input and $1k{\Omega}$ resistor and 1 nF capacitor are used for output load for simulation and experimental environment. In simulation environment, voltage conversion efficiency(VCE) is 87.5 % and Power conversion efficiency(PCE) is 50 %. When the rectifier is measured, VCE shows 90.203 % and PCE shows 45 %.