• Proceedings of the Materials Research Society of Korea Conference
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• 2003.03a
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• pp.138-138
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• 2003

광대역 LiNbO$_3$ 광변조기의 초고속 광 변조 구현을 위해서는 RF/ optical 속도 정합 및 임피던스 매칭 조건 하에서 낮은 구동전압을 얻을 수 있는 ridge 구조의 제작이 필수적이며 이런 구조 제작하기 위해서는 식각 속도와 식각면 거칠기 식각 profile 및 식각 과정에서의 반응물의 감소 등과 같은 개선을 위한 연구가 필요하다. 본 연구에서는 LiNbO$_3$ 기판 위에 메탈 마스크를 형성한 후 비등방성 (anisotropic) 건식 식각 방법인 NLD (Neutral Loop Discharge)로 플라즈마 식각을 하였다. NLD plasma 식각은 1Pa 이하의 압력에서 낮은 전자 온도를 갖는 고밀도 플라즈마를 생성하고 이온 플라즈마를 형성하여 LiNbO$_3$ 표면의 원자와 분자를 이온충돌효과를 이용하여 물리적인 식각과 discharge로 형성된 레디칼 (radical)과의 상호작용에 의한 화학적 식각 메커니즘에 의한 방법으로 plasma에 의한 시편의 손상이 적으며 식각 속도가 또한 높은 것이 특징이다. 본 논문에서는 안테나 파워와 가스의 유량에 따른 LiNbO$_3$ 식각 profile 특성에 관하여 연구 하고자 한다.

• Journal of the Korean Society of Manufacturing Technology Engineers
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• v.25 no.1
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• pp.62-67
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• 2016

This paper presents a silicon nanostructure array embedded in a polymer film. The silicon nanostructure array was fabricated by using basic microelectromechanical systems (MEMS) processes such as photolithography, reactive ion etching, and anisotropic KOH wet etching. The fabricated silicon nanostructure array was transferred into polymer substrates such as polymethyl methacrylate (PMMA), polyethylene terephthalate (PET), and polycarbonate (PC) through the hot-embossing process. In order to determine the transfer conditions under which the silicon nanostructures do not fracture, hot-embossing experiments were performed at various temperatures, pressures, and pressing times. Transfer was successfully achieved with a pressure of 1 MPa and a temperature higher than the transition temperature for the three types of polymer substrates. The transferred silicon nanostructure array was electrically evaluated through measurements with a semiconductor parameter analyzer (SPA).

• Journal of Sensor Science and Technology
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• v.15 no.1
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• pp.1-6
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• 2006

We fabricated Si nano-wire MOSFET by using the conventional photolithography with a $1.5{\mu}m$ resolution. Si nano-wire was fabricated by using reactive ion etching (RIE), anisotropic wet etching and thermal oxidation on a silicon-on-insulator (SOI) substrate, and its width is 30 nm. Logarithmic circuit consisting of a NMOSFET and Si nano-wire MOSFET has been constructed for application to high-sensitivity image sensor. Its sensitivity was 1.12 mV/lux. The output voltage swing was 1.386 V.

• Journal of the Korean Society for Precision Engineering
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• v.18 no.1
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• pp.89-97
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• 2001

A microgyroscope, which vibrates in two orthogonal axes on the substrate plane, is designed and fabricated. The shuttle mass of the vibrating gyroscope consists of two parts. The one is outer shuttle mass which vibrates in driving mode guided by four folded springs attached to anchors. And the other is inner shuttle mass which vibrates in driving mode as the outer frame does and also can vibrate in sensing mode guided by four folded springs attached to the outer shuttle mass. Due to the directions of vibrating mode, it is possible to fabricate the gyroscope with simplified process by using polysilicon on insulator structure. Fabrication processes of the microgyroscope are composed of anisotropic silicon etching by RIE, gas-phase etching (GPE) of the buried sacrificial oxide layer, metal electrode formation. An eletromechanical model of the vibrating microgyroscope was modeled and bandwidth characteristics of the gyroscope operates at DC 4V and AC 0.1V in a vacuum chamber of 100mtorr. The detection circuit consists of a discrete sense amplifier and a noise canceling circuit. Using the evaluated electromechanical model, an operating condition for high performance of the gyroscope is obtained.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.454-454
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• 2014

Silicon microwire array is one of the promising platforms as a means for developing highly efficient solar cells thanks to the enhanced light trapping efficiency. Among the various fabrication methods of microstructures, deep reactive ion etching (DRIE) process has been extensively used in fabrication of high aspect ratio microwire arrays. In this presentation, we show precisely controlled Si microwire arrays by tuning the DRIE process conditions. A periodic microdisk arrays were patterned on 4-inch Si wafer (p-type, $1{\sim}10{\Omega}cm$) using photolithography. After developing the pattern, 150-nm-thick Al was deposited and lifted-off to leave Al microdisk arrays on the starting Si wafer. Periodic Al microdisk arrays (diameter of $2{\mu}m$ and periodic distance of $2{\mu}m$) were used as an etch mask. A DRIE process (Tegal 200) is used for anisotropic deep silicon etching at room temperature. During the process, $SF_6$ and $C_4F_8$ gases were used for the etching and surface passivation, respectively. The length and shape of microwire arrays were controlled by etching time and $SF_6/C_4F_8$ ratio. By adjusting $SF_6/C_4F_8$ gas ratio, the shape of Si microwire can be controlled, resulting in the formation of tapered or vertical microwires. After DRIE process, the residual polymer and etching damage on the surface of the microwires were removed using piranha solution ($H_2SO_4:H_2O_2=4:1$) followed by thermal oxidation ($900^{\circ}C$, 40 min). The oxide layer formed through the thermal oxidation was etched by diluted hydrofluoric acid (1 wt% HF). The surface morphology of a Si microwire arrays was characterized by field-emission scanning electron microscopy (FE-SEM, Hitachi S-4800). Optical reflection measurements were performed over 300~1100 nm wavelengths using a UV-Vis/NIR spectrophotometer (Cary 5000, Agilent) in which a 60 mm integrating sphere (Labsphere) is equipped to account for total light (diffuse and specular) reflected from the samples. The total reflection by the microwire arrays sample was reduced from 20 % to 10 % of the incident light over the visible region when the length of the microwire was increased from $10{\mu}m$ to $30{\mu}m$.

• Proceedings of the Korean Society of Tribologists and Lubrication Engineers Conference
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• 2002.10b
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• pp.207-208
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• 2002

In the present study, the friction and wear properties of boundary lubricated textured surfaces were investigated. The capability of textured surfaces to feed lubricant into the interface of a sliding contact and to isolate wear partices was studied and related to the properties of the textured surfaces. Well-defined surface textures were produced by lithography and anisotropic etching of silicon wafers. Different widths and distributions of parallel groves were manufactured and subsequently the wafers were PVD coated with thin wear resistant TiN or DLC coatings, retaining the substrate texture. The surfaces were evaluated in reciprocating sliding against a ball bearing steel ball under starved or boundary lubricated conditions.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1995.05a
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• pp.172-176
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• 1995

Schemes to trap weakly absorbed light into the cell have played an important role in improving the efficiency of both amorphous and crystlline silicon solar cells. One class of scheme relies on randomizing the direction of light within the cell by use of Lambertian(diffuse)surfaces. A second class of scheme relies on the use fo well defined geometrical features to control the direction of light wihin the cell, Widly used geometrical features in crystalline silicon solar cells are the square based pyramids and V-shaped grooves formed in (100) orientated surfaces by intersecting(III) crystallographic planes exposed by anisotropic etching. 18.5% conversion efficiency of Buried Contact Solar Cell with pyramidally textured surface has been achieved. 18.5% efficiency of silicon solar cell is one the highest record in the world The efficieny of cell without textured surface was 16.6%, When adapting textured surface to the Cell, the efficiency has been improved over 12%.

• Journal of Sensor Science and Technology
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• v.3 no.1
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• pp.19-25
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• 1994

When etching rectangular convex corners of silicon using anisotropic etchants such as KOH, deformation of the edges always occurs due to undercutting. Therefore, it is necessary to correct the mass pattern for compensation. Experiments for the compensation method to prevent this phenomenon were carried out. In the result, the compensation pattern of a regular square is suitable for acceleration sensors considering space. With this consequence, silicon piezoresistive acceleration sensor with compensated square pillar type of mass has been fabricated using SDB wafer.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07b
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• pp.792-796
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• 2002

In this work, porous silicon(PS) layer is used as a sensing material to detect organic gases. To do this, PS sensors with membrane structure are fabricated. The sensors were made by applying the technologies of membrane formation by anisotropic etching of silicon, and PS layer formation by anodization in HF solution. From fabricated sensors, current-voltage (I-V) curves were measured against ethanol (called alcohol), methanol and acetone gases evaporated from 0.1 to 0.5% solution concentrations at $36^{\circ}C$. As the result, all curves showed rectifying behavior due to a diode structure between Si and PS, and the conductance of sensor devices increased largely with the organic solution concentration at high voltage of 5V.

• Proceedings of the KIEE Conference
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• 2001.07c
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• pp.1890-1892
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• 2001

This paper described on the fabrication of microstructures by DRIE(Deep Reactive Ion Etching). SOI(Si-on-insulator) electric devices with buried cavities are fabricated by SDB technology and electrochemical etch-stop. The cavity was fabricated the upper handling wafer by Si anisotropic etch technique. SDB process was performed to seal the fabricated cavity under vacuum condition at -750 mm Hg. In the SDB process, captured air and moisture inside of the cavities were removed by making channels towards outside. After annealing(1000$^{\circ}C$, 60 min.), the SDB SOI structure was thinned by electrochemical etch-stop. Finally, it was fabricated microstructures by DRIE as well as a accurate thickness control and a good flatness.