• Title/Summary/Keyword: amplifiers

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Nonlinear interferometric optical parametric amplifier (비선형 간섭계 파라메트릭 광증폭기)

  • Lee, Sang-Yong;Kim, Jae-Kwan;Jeong, Je-Myung;Chang, Ho-Sung
    • Korean Journal of Optics and Photonics
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    • v.14 no.2
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    • pp.175-183
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    • 2003
  • We obtain a solution of optical parametric amplification using self-phase modulation within the Kerr media in a nonlinear interferometer with two arms. We show that it is equivalent to the solution driven by four-wave mixing and that the solution of parametric amplification is suitable to generate a parametric gain. We obtain a derivative of power gain with respect to the propagation distance and show that gain-saturation can occur as the beam propagates along the nonlinear arms. We also show a bandwidth characteristic of the parametric amplification driven by nondegenerate four-wave mixing. Numerical examples are given to illustrate that the solution of the parametric amplification can be applied to design and analysis of all-optical devices such as all-optical amplifiers.

A 3 Stage MMIC Low Noise Amplifier for the Ka Band Satellite Communications and BWLL System (Ka 대역 위성통신 및 BWLL 시스템용 3단 MMIC 저잡음 증폭기 설계 및 제작)

  • 염인복;정진철;이성팔
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.12 no.1
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    • pp.71-76
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    • 2001
  • A Ka Band 3-stage MMIC (Monolithic Microwave Integrated Circuits) LNA (Low Noise Amplifiers) has been designed and fabricated far the Ka band satellite communications and BWLL(Broad Band Wireless Local Loop)system. The MMIC LNA consists of two single-ended type amplification stages and one balanced type amplification stage to satisfy noise figure, high gain and amplitude linearity. The 0.15${\mu}{\textrm}{m}$ pHEMT has been used to provide a ultra low noise figure and high gain amplification. Series and Shunt feedback circuits and λ/4 short lines were inserted to ensure high stability over the frequency range form DC to 80 GHz. The size of the MMIC LNA is 3.1mm$\times$2.4mm(7.44mm$^2$). The on wafer measured performance of the MMIC LNA, which agreed with the designed performance, showed the noise figure of less than 2.0 dB, and the gain of more than 26 dB, over frequency ranges from 22 GHz to 30 GHz.

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MMIC Low Noise Amplifier Design for Millimeter-wave Application (밀리미터파 응용을 위한 MMIC 저잡음 증폭기 설계)

  • 장병준;염인복;이성팔
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.12 no.7
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    • pp.1191-1198
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    • 2001
  • MMIC low noise amplifiers for millimeter-wave application using 0.15 $\mu$m pHEMT have been presented in this paper. The design emphasis is on active device model and EM simulation. The deficiency of conventional device models is identified. A distributed device model has been adapted to circumvent the scaling problems and, thus, to predict small signal and noise parameters accurately. Two single-ended low noise amplifier are designed using distributed active device model for Q-band(40 ∼ 44 GHz) and V-band(58 ∼65 GHz) application. The Q-band amplifier achieved a average noise figure of 2.2 dB with 18.3 dB average gain. The V-band amplifier achieved a average noise figure of 2.9 dB with 14.7 dB average gain. The design technique and model employed provides good agreement between measured and predicted results. Compared with the published data, this work also represents state-of-the-art performance in terms of gain and noise figure.

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Design of Postdistortion Linearizer using Complex Envelope Transfer Characteristics of Power Amplifier (전력 증폭기의 복소 포락선 전달특성을 이용한 Postdistortion 방식의 선형화기의 설계)

  • 한재희;이덕희;남상욱;남상욱;임종식
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.12 no.7
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    • pp.1086-1093
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    • 2001
  • A new linearization technique for RF high-power amplifiers(HPAs) using n-th order error signal generator (ESGn) is proposed. The n-th order ESG generates an error signal based on the complex envelope transfer characteristics of the HPA, which is combined at the output of the HPA. Therefore, the higher-order nonlinearlities are not affected by the ESG$\_$n/ and the stability of the linearized system is guaranteed due to the inherent open-loop configuration. Moreover, the output delay loss can be avoided, because the error signal is generated with the input signal of the HPA. The IMD(intermodulation distortion) improvement obtained applying the ESG$\_$7/ to 5 W class A HPA in cellular band demonstrates the feasibility of the proposed postdistortion system.

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A 20 GHz Band 1 Watt MMIC Power Amplifier (20 GHz대 1 Watt 고출력증폭 MMIC의 설계 및 제작)

  • 임종식;김종욱;강성춘;남상욱
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.10 no.7
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    • pp.1044-1052
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    • 1999
  • A 2-stage 1 watt MMIC(Monolithic Microwave Integrated Circuits) HPA(High Power Amplifiers) at 20 GHz band has been designed and fabricated. The $0.15\mu\textrm{m}$ with the width of $400\mu\textrm{m}$for single device pHEMT technology was used for the fabrication of this MMIC HPA. Due to the series feedback technique from source to ground, bias circuits and stabilization circuits on the main microstrip line, the stability factors(Ks) are more than one at full frequency. The independent operation for each stage and excellent S11, S22 less than -20 dB have been obtained by using lange couplers. For beginning the easy design, linear S-parameters have been extracted from the nonlinear equivalent circuit in foundry library, and equivalent circuits of devices at in/output ports were calculated from this S-parameters. The measured performances, which are in well agreement with the predicted ones, showed the MMIC HPA in this paper has the minimum 15 dB of linear gain, -20 dB of reflection coefficients and 31 dBm of output power over 17~25 GHz.

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A 6-16 GHz GaN Distributed Power Amplifier MMIC Using Self-bias

  • Park, Hongjong;Lee, Wonho;Jung, Joonho;Choi, Kwangseok;Kim, Jaeduk;Lee, Wangyong;Lee, Changhoon;Kwon, Youngwoo
    • Journal of electromagnetic engineering and science
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    • v.17 no.2
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    • pp.105-107
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    • 2017
  • The self-biasing circuit through a feedback resistor is applied to a gallium nitride (GaN) distributed power amplifier (PA) monolithic microwave circuit (MMIC). The self-biasing circuit is a useful scheme for biasing depletion-mode compound semiconductor devices with a negative gate bias voltage, and is widely used for common source amplifiers. However, the self-biasing circuit is rarely used for PAs, because the large DC power dissipation of the feedback resistor results in the degradation of output power and power efficiency. In this study, the feasibility of applying a self-biasing circuit through a feedback resistor to a GaN PA MMIC is examined by using the high operation voltage of GaN high-electron mobility transistors. The measured results of the proposed GaN PA are the average output power of 41.1 dBm and the average power added efficiency of 12.2% over the 6-16 GHz band.

System identification of soil behavior from vertical seismic arrays

  • Glaser, Steven D.;Ni, Sheng-Huoo;Ko, Chi-Chih
    • Smart Structures and Systems
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    • v.4 no.6
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    • pp.727-740
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    • 2008
  • A down hole vertical seismic array is a sequence of instruments installed at various depths in the earth to record the ground motion at multiple points during an earthquake. Numerous studies demonstrate the unique utility of vertical seismic arrays for studying in situ site response and soil behavior. Examples are given of analyses made at two sites to show the value of data from vertical seismic arrays. The sites examined are the Lotung, Taiwan SMART1 array and a new site installed at Jingliao, Taiwan. Details of the installation of the Jingliao array are given. ARX models are theoretically the correct process models for vertical wave propagation in the layered earth, and are used to linearly map deeper sensor input signals to shallower sensor output signals. An example of Event 16 at the Lotung array is given. This same data, when examined in detail with a Bayesian inference model, can also be explained by nonlinear filters yielding commonly accepted soil degradation curves. Results from applying an ARMAX model to data from the Jingliao vertical seismic array are presented. Estimates of inter-transducer soil increment resonant frequency, shear modulus, and damping ratio are presented. The shear modulus varied from 50 to 150 MPa, and damping ratio between 8% and 15%. A new hardware monitoring system - TerraScope - is an affordable 4-D down-hole seismic monitoring system based on independent, microprocessor-controlled sensor Pods. The Pods are nominally 50 mm in diameter, and about 120 mm long. An internal 16-bit micro-controller oversees all aspects of instrumentation, eight programmable gain amplifiers, and local signal storage.

A Gain Enhancing Scheme for Op-Amp in High Performance AIPS Using Negative Resistance Element (고성능 AIPS 내의 연산증폭기에 대하여 부저항소자를 사용한 이득개선방법)

  • Chung Kang-Min;Kim Sung-Mook
    • The KIPS Transactions:PartA
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    • v.12A no.6 s.96
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    • pp.531-538
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    • 2005
  • In the high performance Analog Information Processing Systems(AIPS), gain boosting or additional gain stage is required when the gain is not sufficient with one stage amplification. This work shows that high gain is neatly obtained by enhancing the gain using the negative resistance element. Compared to the conventional techniques, the proposed scheme enjoys full output swing, small circuit area and power consumption, and the applications to various configurations of amplifiers. The negative resistance element is placed between the differential output nodes when used in the Op-Amp. The HSPICE simulation indicates that enhancement of more than 40 dB is readily obtained in this simple configuration when the negative resistance element is implemented in the form of cross-coupled CMOS inverters.

A Study on a Algorithm of Gait Analysis and Step Count with Pressure Sensors (보행수 측정 및 보행패턴 분류 알고리즘)

  • Do, Ju-pyo;Choi, Dae-yeong;Kim, Dong-jun;Kim, Kyung-Ho
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.66 no.12
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    • pp.1810-1814
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    • 2017
  • This paper develops an approach to the algorithm of Gait pattern Analysis and step measurement with Multi-Pressure Sensors. The process of gait consists of 8 steps including stance and swing phase. As 3 parts of foot is supporting most of human weight, multiple pressure sensors are attached on the parts of foot: forefoot, big toe, heel. As 3 parts of foot is supporting most of human weight, multiple pressure sensors are attached on the parts of foot: forefoot, big toe, heel. normal gait proceed from heel, forefoot and big toe over time. While normal gait proceeds, values of heel, forefoot and big toe can be changed over time. So Each values of pressure sensors over time could discriminate whether it is normal or abnormal gait. Measuring Device consists of non-inverting amplifiers and low pass filter. Through timetable of values, normal gait pattern can be analyzed, because of supported weight of foot. Also, the peak value of pressure can judge whether it is walking or running. While people are running, insole of shoes is floating in the air on moment. Using this algorithm, gait analysis and step count can be measured.

PSPICE analysis of the Lorenz circuit using the MOS resistor (MOS 가변저항을 이용한 로렌츠 회로의 PSPICE 해석)

  • Ji, Sung-Hyun;Kim, Boo-Kang;Nam, Sang-Guk;Nguyen, Van Ha;Park, Yong Su;Song, Han Jung
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.16 no.2
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    • pp.1348-1354
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    • 2015
  • In this paper, chaotic circuit of the voltage controlled Lorentz system for engineering applications has been designed and implemented in an electronic circuit. The proposed circuit consists of MOS variable resistor, multipliers, capacitors, fixed resistors and operational amplifiers. The circuit was analysed by PSPICE program. PSPICE simulation results show that chaotic dynamics of the circuit can be controlled by the MOS variable resistor through time series analysis, frequency analysis and phase diagrams. Also, we implemented the proposed circuit in an electronic hardware system with discrete elements. Measured results of the circuit showed controllability of the circuit using the MOS resistor.