• Title/Summary/Keyword: amplifiers

Search Result 731, Processing Time 0.03 seconds

Development of Surface Myoelectric Sensor for Myoelectric Hand Prosthesis

  • Choi, Gi-Won;Moon, In-Hyuk;Sung, So-Young;Lee, Mynug-Joon;Chu, Jun-Uk;Mun, Mu-Seong
    • 제어로봇시스템학회:학술대회논문집
    • /
    • 2005.06a
    • /
    • pp.1268-1271
    • /
    • 2005
  • This paper proposes a compact-sized surface myoelectric sensor for myoelectric hand prosthesis. To fit the surface myoelectric sensor in the socket of the myoelectric hand prosthesis, the sensor should be a compact size. The surface myoelectric sensor is composed of a skin interface and a single processing circuit that are mounted on a single package. Since the skin interface has one reference and two input electrodes, and the reference electrode is located in middle of two input electrodes, we propose two types of sensors with the circle- and bar-shaped reference electrode, but all input electrodes are the bar-shaped. The metal material used for the electrodes is the stainless steel (SUS440) that endures sweat and wet conditions. Considering conduction velocity and median frequency of the myoelectric signal, we select the inter-electrode distance (IED) between two input electrodes as 18mm, 20mm, and 22 mm. The signal processing circuit consists of a differential amplifier with band pass filter, a band rejection filter for rejecting 60Hz power-line noise, amplifiers, and a mean absolute value circuit. We evaluate the proposed sensor from the output characteristics according to the IED and the shape of the reference electrode. From the experimental results we show the surface myoelectric sensor with the 18mm IED and the bar-shaped reference electrode is suitable for the myoelectric hand prosthesis.

  • PDF

Design of 4-Mbps Transceiver Chip for Wireless Infrared Data Transmission (무선 적외선 데이터 전송을 위한 4-Mbps 송${\cdot}$수신기 칩의 설계)

  • Kim, Kwang-Oh;Choi, Jung-Youl;Choi, Joong-Ho
    • Journal of the Korean Institute of Telematics and Electronics C
    • /
    • v.36C no.2
    • /
    • pp.54-61
    • /
    • 1999
  • This paper describes the design of a 4-Mbps wireless infrared data transceiver chip. The receiver consits of the analog front-end, clock recovery and frame generator, and demodulator. The transmitter consists of the demodulator and LED driver. The versatile analog front- end consisting of multiple amplifiers makes it possible for the chip to be applied to various infrared environments by compensating DC and offset signal components. A 4PPM (pulse position modulation) scheme is used for data transfer in order to meet the IrDA standards. The chip was fabricated in a $0.8-{\mu}m$ 2-poly, 2-metal CMOS technology and dissipates 122mW for ${\pm}2.5V$ supply.

  • PDF

A Gain and NF Dynamic Controllable Wideband Low Noise Amplifier (이득과 잡음 지수의 동적 제어가 가능한 광대역 저 잡음 증폭기)

  • Oh, Tae-Soo;Kim, Seong-Kyun;Huang, Guo-Chi;Kim, Byung-Sung
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.20 no.9
    • /
    • pp.900-905
    • /
    • 2009
  • A common drain feedback CMOS wideband LNA with current bleeding and input inductive series-peaking techniques is presented in this paper. DC coupling is adopted between cascode and feedback amplifiers, so that the gain and NF of the LNA can be dynamically controlled by adjusting the bleeding current. The fabricated LNA shows the bandwidth of 2.5 GHz. The high gain mode shows 17.5 dB gain with $1.7{\sim}2.8\;dB$ NF and consumes 27 mW power and the low gain mode has 14 dB gain with $2.7{\sim}4.0\;dB$ NF and dissipates 1.8 mW from 1.8 V supply.

Preliminary Research of CZT Based PET System Development in KAERI

  • Jo, Woo Jin;Jeong, Manhee;Kim, Han Soo;Kim, Sang Yeol;Ha, Jang Ho
    • Journal of Radiation Protection and Research
    • /
    • v.41 no.2
    • /
    • pp.81-86
    • /
    • 2016
  • Background: For positron emission tomography (PET) application, cadmium zinc telluride (CZT) has been investigated by several institutes to replace detectors from a conventional system using photomultipliers or Silicon-photomultipliers (SiPMs). The spatial and energy resolution in using CZT can be superior to current scintillator-based state-of-the-art PET detectors. CZT has been under development for several years at the Korea Atomic Energy Research Institute (KAERI) to provide a high performance gamma ray detection, which needs a single crystallinity, a good uniformity, a high stopping power, and a wide band gap. Materials and Methods: Before applying our own grown CZT detectors in the prototype PET system, we investigated preliminary research with a developed discrete type data acquisition (DAQ) system for coincident events at 128 anode pixels and two common cathodes of two CZT detectors from Redlen. Each detector has a $19.4{\times}19.4{\times}6mm^3$ volume size with a 2.2 mm anode pixel pitch. Discrete amplifiers consist of a preamplifier with a gain of $8mV{\cdot}fC^{-1}$ and noise of 55 equivalent noise charge (ENC), a $CR-RC^4$ shaping amplifier with a $5{\mu}s$ peak time, and an analog-to-digital converter (ADC) driver. The DAQ system has 65 mega-sample per second flash ADC, a self and external trigger, and a USB 3.0 interface. Results and Discussion: Characteristics such as the current-to-voltage curve, energy resolution, and electron mobility life-time products for CZT detectors are investigated. In addition, preliminary results of gamma ray imaging using 511 keV of a $^{22}Na$ gamma ray source were obtained. Conclusion: In this study, the DAQ system with a CZT radiation sensor was successfully developed and a PET image was acquired by two sets of the developed DAQ system.

A Selective Wireless Power Transfer Architecture Using Reconfigurable Multiport Amplifier (재구성 다중포트 전력증폭기를 이용한 선택적 무선 전력 전송 구조)

  • Park, Seung Pyo;Choi, Seung Bum;Lee, Seung Min;Lee, Moon-Que
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.26 no.5
    • /
    • pp.521-524
    • /
    • 2015
  • This letter presents a selective wireless power transfer architecture using a reconfigurable multi-port amplifier. The proposed wireless power transfer architecture is composed of a phase shifter part controlled by FPGA, two class-E power amplifiers, a four-port power combiner and two coil loads. Depending on the phase control of FPGA, the power ratio of outputs at the two coil loads becomes 1:1, 2:0 and 0:2. The manufactured system has delivered 1W DC power to loads at 125 kHz. The total DC-to-DC conversion efficiency shows more than 40 % including PA efficiency of 79 %.

Digital Pre-Distortion Technique Using Repeated Usage of Feedback Samples (피드백 샘플 반복 활용을 이용한 다지털 전치 왜곡 방안)

  • Lee, Kwang-Pyo;Hong, Soon-Il;Jeong, Eui-Rim
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
    • /
    • 2015.05a
    • /
    • pp.673-676
    • /
    • 2015
  • Digital Pre-Distortion (DPD) is a linearization technique for nonlinear power amplifiers (PAs) by implementing inverse function of the PA at baseband digital stage. To obtain proper DPD parameters, a feedback path is required to convert the PA output to a baseband signal, and a memory is also needed to store the feedback signals. DPD parameters are usually found by an adaptive algorithm from the feedback samples. However, for the adaptive algorithm to converge to a reliable solution, long feedback samples are required, which increases convergence time and hardware complexity. In this paper, we propose a DPD technique that requires relatively short feedback samples. From the observation that the convergence time of the adaptive algorithm highly depends on the initial condition, this paper iteratively utilizes the feedback samples while keeping and using the converged DPD parameters at the former iteration as the initial condition at the current iteration. Computer simulation results show that the proposed method performs better than the conventional technique while the former requires much shorter feedback samples than the latter.

  • PDF

A Robust Digital Pre-Distortion Technique in Saturation Region for Non-linear Power Amplifier (비선형 전력 증폭기의 포화영역에서 강인한 디지털 전치왜곡 기법)

  • Hong, Soon-Il;Jeong, Eui-Rim
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
    • /
    • 2015.05a
    • /
    • pp.681-684
    • /
    • 2015
  • Power amplifier is an essential component for transmitting signals to a remote receiver in wireless communication systems. Power amplifier is a non-linear device in general, and the nonlinear distortion becomes severer as the output power increases. The nonlinearity results in spectral regrowth, which leads to adjacent channel interference, and decreases the transmit signal quality. To linearize power amplifiers, many techniques have been developed so far. Among the techniques, digital pre-distortion is known as the most cost and performance effective technique. However, the linearization performance falls down abruptly when the power amplifier operates in its saturation region. This is because of the severe nonlinearity. To relieve this problem, this paper proposes a new adaptive predistortion technique. The proposed technique controls the adaptive algorithm based on the power amplifier input level. Specifically, for small signals, the adaptive predistortion algorithm works normally. On the contrary, for large signals, the adaptive algorithm stops until small signals occur again. By doing this, wrong coefficient update by severe nonlinearity can be avoided. Computer simulation results show that the proposed method can improve the linearization performance compared with the conventional digital predistortion algorithms.

  • PDF

A CMOS Intermediate-Frequency Transceiver IC for Wireless Local Loop (무선가입자망용 CMOS 중간주파수처리 집적회로)

  • 김종문;이재헌;송호준
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.24 no.8A
    • /
    • pp.1252-1258
    • /
    • 1999
  • This paper describes a COMS IF transceiver IC for 10-MHz bandwidth wireless local loops. It interfaces between the RF section and the digital MODEM section and performs the IF-to-baseband (Rx) and baseband-to-IF (Tx) frequency conversions. The chip incorporates variable gain amplifiers, phase-locked loops, low pass filters, analog-to-digital and digital-to-analog converters. It has been implemented in a 0.6 -${\mu}{\textrm}{m}$ 2-poly 3-metal CMOS process. The phase-locked loops include voltage-controlled oscillators, dividers, phase detectors, and charge pumps on chip. The only external complonents are the filter and the varactor-tuned LC tank circuit. The chip size is 4 mm $\times$ 4 mm and the total supply current is about 57 mA at 3.3 V.

  • PDF

A Novel Transmit Diversity Technique for IS-2000 Systems (IS-2000 시스템을 위한 SS-OTD에 관한 연구)

  • Yoon, Hyun-Goo;Yook Jong-Gwan;Park, Han-Kyu
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.27 no.1B
    • /
    • pp.56-65
    • /
    • 2002
  • This paper proposes a novel transmit diversity technique, namely symbol split orthogonal transmit diversity (SS-OTD). In this technique, full path diversity and temporal diversity are achieved by combining orthogonal transmit diversity technique (OTD) technique with the symbol splitting method proposed by Meyer. Its performances is simulated for fundamental channels associated with the forward link of the IS-2000 system, and then compared with those of OTD and space-time spreading (STS). Our proposed method offers a 0.5-7.7dB performance improvement over OTD under various simulation environments and its performance is similar to STS. Moreover, compares with that of STS, the peak-to-average power ratio (PAR) of transmitted signals in SS-OTD is reduced by a maximal 1.35dB, which decreases the complexity of base station RF devices, such as power amplifiers. Thus, SS-OTD is comparable to STS in performance and superior to STS in the cost and efficiency of base station RF devices.

A Design and Implementation of 4×10 Gb/s Transimpedance Amplifiers (TIA) Array for TWDM-PON (TWDM-PON 응용을 위한 4×10 Gb/s Transimpedance Amplifier 어레이 설계 및 구현)

  • Yang, Choong-Reol;Lee, Kang-Yoon;Lee, Sang-Soo
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.39B no.7
    • /
    • pp.440-448
    • /
    • 2014
  • A $4{\times}10$ Gb/s Transimpedance Amplifier (TIA) array is implemented in $0.13{\mu}m$ CMOS process technology, which will be used in the receiver of TWDM-PON system. A technology for bandwidth enhancement of a given $4{\times}10$ Gb/s TIA presented under inductor peaking technology and a single 1.2V power supply based low voltage design technology. It achieves 3 dB bandwidth of 7 GHz in the presence of a 0.5 pF photodiode capacitance. The trans-resistance gain is $50dB{\Omega}$, while 48 mW/ 1channel from a 1.2 V supply. The input sensitivity of the TIA is -27 dBm. The chip size is $1.9mm{\times}2.2mm$.