• Title/Summary/Keyword: ahead

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A Scalable Word-based RSA Cryptoprocessor with PCI Interface Using Pseudo Carry Look-ahead Adder (가상 캐리 예측 덧셈기와 PCI 인터페이스를 갖는 분할형 워드 기반 RSA 암호 칩의 설계)

  • Gwon, Taek-Won;Choe, Jun-Rim
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.39 no.8
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    • pp.34-41
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    • 2002
  • This paper describes a scalable implementation method of a word-based RSA cryptoprocessor using pseudo carry look-ahead adder The basic organization of the modular multiplier consists of two layers of carry-save adders (CSA) and a reduced carry generation and Propagation scheme called the pseudo carry look-ahead adder for the high-speed final addition. The proposed modular multiplier does not need complicated shift and alignment blocks to generate the next word at each clock cycle. Therefore, the proposed architecture reduces the hardware resources and speeds up the modular computation. We implemented a single-chip 1024-bit RSA cryptoprocessor based on the word-based modular multiplier with 256 datapaths in 0.5${\mu}{\textrm}{m}$ SOG technology after verifying the proposed architectures using FPGA with PCI bus.

HDL Codes Generator for Cyclic Redundancy Check Codes (순환중복검사 부호용 하드웨어 HDL 코드 생성기)

  • Kim, Hyeon-kyu;Yoo, Ho-young
    • Journal of IKEEE
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    • v.22 no.4
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    • pp.896-900
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    • 2018
  • Traditionally, Linear Shift Feedback Register (LFSR) has been widely employed to implement Cyclic Redundant Check (CRC) codes for a serial input. Since many applications including network and storage systems demand as high throughput as ever, various efforts have been made to implement CRC hardware to support parallel inputs. Among various parallel schemes, the look-ahead scheme is one of the most widely used schemes due to its short critical path. However, it is very cumbersome to design HDL codes for parallel CRC codes since the look-ahead scheme is inevitable to consider how register and input values move in the next cycles. Thus, this paper proposes a novel CRC hardware generator, which automatically produces HDL codes given a CRC polynomial and parallel factor. The experimental results verify the applicability to use the proposed generator by analyzing the synthesis results from the generated HDL code.

반도체 물류 제어 시스템을 위한 RTLAD(Real Time Look Ahead Dispatcher) 핵심 기법 개발

  • Seo, Jeong-Dae;Gu, Pyeong-Hoe;Jang, Jae-Jin
    • Proceedings of the Korean Operations and Management Science Society Conference
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    • 2004.05a
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    • pp.433-436
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    • 2004
  • 반도체 및 LCD 제조 라인의 물류 제어 시스템을 위하여 시스템의 현재 및 미래의 Look ahead 정보를 사용하고 반송장비의 운반 상황을 동시에 고려하면서 디스패칭(dispatching) 과정을 수행하는 RTLAD(Real Time Look Ahead Dispatcher)를 위한 핵심 기법들을 개발한다. 특히, 베이(bay) 내에서 로트의 가공이 완료 되었을 때 다음 스텝 공정을 위하여 목적지 장비를 실시간으로 결정하는 절차를 제시하며, 동시에 목적지 장비까지의 반송장비를 선택하는 절차를 제시한다. 목적지 장비 결정 과정에서 반송장비의 상황을 함께 고려한다.

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Evaluation of Call Overheads Between Java Ahead-of-Time Compiler and Interpreter (자바 Ahead-of-Time 컴파일러와 해석기 간의 호출 오버헤드 평가)

  • Kim, Ik-Hyun;Jung, Dong-Heon;Oh, Hyung-Sk;Moon, Soo-Mook
    • Proceedings of the Korean Information Science Society Conference
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    • 2007.06c
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    • pp.521-526
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    • 2007
  • 내장형 자바의 성능 향상을 위해 바이트코드를 기계어 코드로 미리 번역하여 내장형 시스템에 설치하는 Ahead-of-Time Compile(AOTC)가 많이 사용되고 있으나 수행 중에 동적으로 다운로드 되는 바이트코드를 수행하기 위해서는 기존의 해석기도 함께 사용되어야 한다. 이 경우 일부 자바 메소드는 AOTC에 의해 처리되고 일부 메소드는 해석기에 의해 수행되는 하이브리드 수행 환경이 된다. 이러한 환경에서 해석기 메소드가 AOTC 메소드를 호출하거나 AOTC 메소드가 해석기 메소드를 호출하는 경우 호출 오버헤드가 커서 성능을 저하시킬 수 가 있다. 본 연구에서는 AOTC에서 사용 가능한 두 가지 호출 인터페이스인 Java Native Interface(JNI)와 Compiled Native Interface(CNI)에 대해 하이브리드 수행 환경에서의 호출 오버헤드와 성능을 평가하고 각각의 장단점에 대해 논의한다.

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Distribution Planning for Capacitated Supply Chains Using Tabu Search Approach (타부 탐색을 이용한 생산능력 제한하의 공급망 분배계획)

  • Kwon, Ick-Hyun;Baek, Jong-Kwan;Kim, Sung-Shick
    • IE interfaces
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    • v.18 no.1
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    • pp.63-72
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    • 2005
  • In this paper, we present a distribution planning method for a supply chain. Like a typical distribution network of manufacturing firms, we have the form of arborescence. To consider more realistic situation, we investigated that an outside supplier has limited capacity. The customer demands are given in deterministic form in finite number of discrete time periods. In this environment, we attempt to minimize the total costs, which is the sum of inventory holding and backorder costs over the distribution network during the planning horizon. To make the best of the restricted capacity, we propose the look-ahead feature. For looking ahead, we convert this problem into a single machine scheduling problem and utilize tabu search approach to solve it. Numerous simulation tests have shown that the proposed algorithm performs quite well.

Optimal Offer Strategies for Energy Storage System Integrated Wind Power Producers in the Day-Ahead Energy and Regulation Markets

  • Son, Seungwoo;Han, Sini;Roh, Jae Hyung;Lee, Duehee
    • Journal of Electrical Engineering and Technology
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    • v.13 no.6
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    • pp.2236-2244
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    • 2018
  • We make optimal consecutive offer curves for an energy storage system (ESS) integrated wind power producer (WPP) in the co-optimized day-ahead energy and regulation markets. We build the offer curves by solving multi-stage stochastic optimization (MSSO) problems based on the scenarios of pairs consisting of real-time price and wind power forecasts through the progressive hedging method (PHM). We also use the rolling horizon method (RHM) to build the consecutive offer curves for several hours in chronological order. We test the profitability of the offer curves by using the data sampled from the Iberian Peninsula. We show that the offer curves obtained by solving MSSO problems with the PHM and RHM have a higher profitability than offer curves obtained by solving deterministic problems.

Prediction of Discontinuity and Determination of Rock Property ahead of Tunnel Face by VSP application (수직 탄성파탐사를 응용한 터널 전방의 불연속면 예측과 암반 물성 파악)

  • 남기천;이진무;차성수
    • Tunnel and Underground Space
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    • v.5 no.3
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    • pp.214-222
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    • 1995
  • Geological events which are undetected by the surface geophysical or geological survey phase can cause many problems, especially when the tunnel is excavated by TBM. To detect the geological events ahead of tunnel face, a seismic method applied from VSP method is used. Generally uniaxial geophone has been used in surface seismic survey. But this time, triaxial geophone is used to reduce the noise of tunnel wave. DME(Dip moveout Enhancement) filter and diffraction stack method are used. Applying these techniques to the road tunnel in construction, it is proved that the geological events ahead of tunnel face is fairly well predicted. From the seismic trace, Vp and Vs which are related to the rock property can be also obtained. Rock property and proper support design can be dedced from these parameters.

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Variation of Load Management Incentive Considering Prenotification Period (예고기간별 차이를 반영한 부하조정제도 지원금 차등방안)

  • Won, Jong-Ryul
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.61 no.11
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    • pp.1578-1583
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    • 2012
  • There are 3 systems in incentive-based normal load management in Korea; day or hour-ahead, week-ahead, months-ahead. These are originally similar in their operational implementation, but differ in their pre-notification period. Therefore the incentive of these systems should be different according to prenotification period. This is the key problem in implementing these load managements. Customers participating in these load managements feel their economic differences, depending on the risk by prenotification dates. The shorter prenotification period, the more risk take the customers. This paper proposes the method of incentive variation in prenotification difference, by using the theory of financial yield curve, which is used in analysing short and long duration bond interesting rates and is reflecting risk premium in their period.

A Study for CBL(Customer Baseline Load) utilization in Day Ahead Demand Response operation (상시수요응답(Day Ahead Demand Response) 운영에서의 CBL 활용방안 연구)

  • Ko, Jong-Min;Yang, Il-Kwon;Song, Jae-Ju;Jin, Sung-Il
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.58 no.1
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    • pp.28-34
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    • 2009
  • In this study firstly we survey the calculation method and the characteristics of the way of estimating CBL(Customer BaseLine Load) that is important calculation tool for DRP internationally. Also we analyze the power consumption pattern using the 15 minutes load profiles of about 120,000 customers in domestic. Based on this pattern, we provide the CBL calculation method that can be utilized in DRP to save the cost, and analyze the accuracy of the CBL calculation proposed in this paper through the simulation.

A High Speed Bit-level Viterbi Decoder

  • Kim Min-U;Jo Jun-Dong
    • Proceedings of the Korea Inteligent Information System Society Conference
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    • 2006.06a
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    • pp.311-315
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    • 2006
  • Viterbi decoder는 크게 BM(Branch metric), ACS(Add-Compare-Select), SM(Survivor Memory) block 으로 구성되어 있다. 이중 ACSU 부분은 고속 데이터 처리를 위한 bottleneck이 되어 왔으며, 이의 해결을 위한 많은 연구가 활발히 진행되어 왔다. look ahead technique은 ACSU를 M-step으로 처리하고 CS(Carry save) number를 사용한 새로운 비교 알고리즘을 제안하여 high throughput을 추구했으며, minimized method는 block processing 방식으로 forward, backward 방향으로 decoding을 수행하여 ACSU 부분의 feedback을 완전히 제거하여 exteremely high throughput 을 추구하고 있다. 이에 대해 look ahead technique 의 기본 PE(Processing Element)를 바탕으로 minimized method 알고 리즘의 core block 을 bit-level 로 구현하였으며 : code converter 를 이용하여 CS number 가운데 redundat number(l)를 제거하여 비교기를 더 간단히 하였다. SYNOPSYS의 Design compiler 와 TSMC 0.18 um library 를 이용하여 합성하였다.

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