• Title/Summary/Keyword: address

Search Result 7,374, Processing Time 0.036 seconds

Analysis of the Influence of the Address Electrode Width on High-speed Addressing Using the Vt Close Curve and Dynamic Vdata Margin

  • Kim, Yong-Duk;Park, Se-Kwang
    • KIEE International Transactions on Electrophysics and Applications
    • /
    • v.5C no.5
    • /
    • pp.183-190
    • /
    • 2005
  • In order to drive the high-density plasma displays, a high-speed driving technology must be researched. In this experiment, the relationship between the width of the address electrode and high-speed driving is analyzed using the Vt close curve and the panel structure for high-speed driving is proposed. In addition we show that the wider the width of the address electrode is, the narrower the width of the scan pulse becomes. Therefore, we could achieve the minimum data voltage of 50.1V at a scan pulse width of $1.0/{\mu}s$ and a ramp voltage of 210V at an address electrode width of $180/{\mu}m$ for the high-speed driving 4-inch test PDP.

Effect of Auxiliary Address Pulse on Face-to-face Sustain Electrode Structure in AC-PDP

  • Kim, Bo-Sung;Tae, Heung-Sik
    • 한국정보디스플레이학회:학술대회논문집
    • /
    • 2007.08a
    • /
    • pp.605-608
    • /
    • 2007
  • The discharge characteristics of the face-to-face sustain electrode structure employing auxiliary address pulse are investigated under a sustain driving frequency of 20 kHz and various auxiliary address pulse widths (500 ns, $1{\mu}s$, $2\;{\mu}s$) in the 6-in. test panel (42-in. Full HD grade) with a pressure of 450 Torr and a 4 % Xe-content. The luminance and the luminous efficiency at the auxiliary address pulse width of 500 ns are improved more than these of $1\;{\mu}s$ and $2\;{\mu}s$. At the auxiliary address pulse width of 500 ns, the luminous efficiency shows about 0.96 lm/W at the auxiliary pulse of 90 V and the sustain voltage of 260 V.

  • PDF

Vector Quantization Using a Dynamic Address Mapping (동적 주소 사상을 이용한 벡터 양자화)

  • Bae, Sung-Ho;Seo, Dae-Wha;Park, Kil-Houm
    • The Transactions of the Korea Information Processing Society
    • /
    • v.3 no.5
    • /
    • pp.1307-1316
    • /
    • 1996
  • In this paper, we propose a vector quantization method which uses a dynamic address mapping based on exploring the high interblock correlation. In the proposed method, we reduce bit-rate by defining an address transform function, which maps a VQ address of an input block which will be encoded into a new address in the reordered codebook by using side match error. In one case that an original address can be transformed into a new transformed address which is lower than the threshold value, we encode the new address of the transformed convector, and in the other case we encode the address of the original convector which is not transformed. Experimental results indicate that the proposed scheme reduces the bit-rate by 45~50% compared with the ordi-nary VQ method forimage compression, at the same quality of the reconstructed image as that of the ordinary VQ system.

  • PDF

Effective IPv6 Address Allocation Mechanism in All IP Wireless Networks (차세대 이동통신망에서 효율전인 IPv6 주소할당 방안)

  • 정현철;민상원
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.29 no.2B
    • /
    • pp.240-249
    • /
    • 2004
  • For the effective IP-based service implementation in the wireless network environment, involvement of IP-related technologies in wireless networks is inevitable and globally unique IPv6 address allocation to the mobile node has become an important issue. In the 3GPP's address allocation mechanism, IPv6 address allocation procedure is performed by the GGSN, which is normally located far from the mobile nodes. This causes IPv6 address allocation time delay and traffics to be longer and increased in the core network, respectively. In this paper, we propose a new IPv6 address allocation mechanism that is performed by Node B located in RAN. The proposed IPv6 address allocation mechanism can provide IPv6 addresses to mobile nodes within a more reduced time than existing 3GPP's IPv6 address allocation mechanism, and co-operates with existing mechanism as an overlay model to improve reliability of wireless networks. And, for implementation of the proposed address allocation mechanism, it needs not to change the structure of current wireless networks except for the some functional addendum of Node B.

A Hierarchical Cluster Tree Based Address Assignment Method for Large and Scalable Wireless Sensor Networks (대규모 무선 센서 네트워크를 위한 계층적 클러스터 트리 기반 분산 주소 할당 기법)

  • Park, Jong-Jun;Jeong, Hoon;Hwang, So-Young;Joo, Seong-Soon
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.34 no.12B
    • /
    • pp.1514-1523
    • /
    • 2009
  • It is well known that the current wireless sensor networks addressing methods do not work efficiently in networks more than a few hundred nodes. A standard protocol in ZigBee-Standard feature in ZigBee 2007 gives balanced tree based address assignment method with distributed manner. However, it was limited to cover less than hundreds of sensor nodes due to the wasteful use of available address space, because composed sensor networks usually make an unbalanced tree topology in the real deployment. In this paper, we proposed the hierarchical cluster tree based address assignment method to support large and scalable networks. This method provides unique address for each node with distributed manner and supports hierarchical cluster tree on-demand. Simulation results show that the proposed method reduces orphan nodes due to the address exhaustion and supports larger network with limited address space compared with the ZigBee distributed address assignment method defined in ZigBee-Standard feature in ZigBee 2007.

Effective address assignment method in hierarchical structure of Zigbee network (Zigbee 네트워크 계층 구조에서의 효율적인 주소 할당 방법)

  • Kim, Jae-Hyun;Hur, Soo-Jung;Kang, Won-Sek;Lee, Dong-Ha;Park, Yong-Wan
    • Journal of the Institute of Electronics Engineers of Korea TC
    • /
    • v.44 no.10
    • /
    • pp.20-28
    • /
    • 2007
  • Zigbee sensor network base on IEEE802.15.4 has local address of 2 byte on transmit packet data which is pick up the address for each sensor node. Sensor network is requested low power, low cost, many nodes at hues physical area. There for Zigbee is very good solution supporting for next Ubiquitous generation but the Zigbee sensor network has address allocation problem of each sensor node. Is established standard from Zigbee Alliance, to the address allocation method uses Cskip algorithm. The Cskip algorithm use the hazard which allocates an address must blow Hop of the maximum modification and child node number. There is to address allocation and from theoretically it will be able to compose a personal 65536 sensor nodes only actual with concept or space, only 500 degree will be able to compose expansion or the low Zigbee network. We proposed an address allocation method using coordinate value for Zigbee sensor network.

High-Speed Korean Address Searching System for Efficient Delivery Point Code Generation (효율적인 순로코드 발생을 위한 고속 한글 주소검색 시스템 개발)

  • Kim, Gyeong-Hwan;Lee, Seok-Goo;Shin, Mi-Young;Nam, Yun-Seok
    • The KIPS Transactions:PartD
    • /
    • v.8D no.3
    • /
    • pp.273-284
    • /
    • 2001
  • A systematic approach for interpreting Korean addresses based on postal code is presented in this paper. The implementation is focused on producing the final delivery point code from various types of address recognized. There are two stages in the address interpretation : 1) agreement verification between the recognized postal code and upper part of the address and 2) analysis of lower part of the address. In the agreement verification procedure, the recognized postal code is used as the key to the address dictionary and each of the retrieved addresses is compared with the words in the recognized address. As the result, the boundary between the upper part and the lower part is located. The confusion matrix, which is introduced to correct possible mis-recognized characters, is applied to improve the performance of the process. In the procedure for interpreting the lower part address, a delivery code is assigned using the house number and/or the building name. Several rules for the interpretation have been developed based on the real addresses collected. Experiments have been performed to evaluate the proposed approach using addresses collected from Kwangju and Pusan areas.

  • PDF

Design of Integrated Address Analysis Mechanism for the Next-Generation Integrated Network (차세대 통합 망을 위한 통합형 주소분석 메커니즘 설계)

  • 신현순;조기성
    • Journal of the Institute of Electronics Engineers of Korea TC
    • /
    • v.41 no.11
    • /
    • pp.39-45
    • /
    • 2004
  • This paper proposes an algorithm of address analysis for the next-generation networks. That is, we present integrated address analysis of the Numbering Plans of public telecommunication networks such as those of the ATM network. The purpose of implementing software for integrated address analysis is to actively and flexibly cope with a large change of information while operating the system and the network. By designing and implementing a database structure and an address analysis algorithm, interworking is possible among part (local) networks that each have a different Addressing Plan within an integrated network. Proposed relational model database structure has effect that do to manage address information of complicated network efficiently. Also, apply in real environment and proved excellency through interworking test to verify mechanism that propose.

A Study of the Effect using Ramp Waveform on the Address Period of Address Display Separated Operating in ac Plasma Display Panel (AC-PDP의 ADS 구동방식에서 어드레스 구간에 기울기파를 사용한 효과에 관한 연구)

  • Joung, Bong-Kyu;Kim, Ji-Sun;Kwon, Shi-Ok;Hwang, Ho-Jung
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
    • /
    • v.18 no.2
    • /
    • pp.180-186
    • /
    • 2005
  • As a driving method of AC-PDP, Address-Display Separated(ADS) driving has been widely adopted for its simple architecture and low discharge failure rate. However, a high definition like a HDTV has defect of long addressing time by reason of a number of pixels. Priming effect isn't fully sustained because of long addressing time during the address period. Therefore, it has different wall charge and luminance of each addressing time in the sustain period. In this study, we suggest a new driving waveform on the address period to improve these defects. We applied a ramp waveform, instead of a square waveform, to an address period in ADS, for operating on the AC-PDP, which used the conventional gas [He-Ne-Xe]. When the ramp waveform is applied to the address period, we experimented for uniform wall charge and the improved luminance by sustained Priming effect at each addressing time in the sustain period.

Hardware based set-associative IP address lookup scheme (하드웨어 기란 집합연관 IP 주소 검색 방식)

  • Yun Sang-Kyun
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.30 no.8B
    • /
    • pp.541-548
    • /
    • 2005
  • IP lookup and forwarding process becomes the bottleneck of packet transmission as IP traffic increases. Previous hardware-based IP address lookup schemes using an index-based table are not memory-efficient due to sparse distribution of the routing prefixes. In this paper, we propose memory-efficient hardware based IP lookup scheme called set-associative IP address lookup scheme, which provides the same IP lookup speed with much smaller memory requirement. In the proposed scheme, an NHA entry stores the prefix and next hop together. The IP lookup procedure compares a destination IP address with eight entries in a corresponding set simultaneously and finds the longest matched prefix. The memory requirement of the proposed scheme is about $42\%$ of that of Lin's scheme. Thus, the set-associative IP address lookup scheme is a memory-efficient hardware based IP address lookup scheme.