• 한국정보통신설비학회:학술대회논문집
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• 2007.08a
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• pp.415-418
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• 2007

This paper presents the design and analysis of LNA-Mixer for 2.45GHz RFID reader. The LNA is implemented by PCSNIM method for low power consumption. The Mixer is implemented by using the Gilbert-type configuration, current bleeding technique, and the resonating technique for the tail capacitance. The connection between the two designed circuits is made by active balun. This LNA-Mixer has about 35dB for -40dBm input RF power, LO power is 0dBm and RF frequency is 2.45 GHz and IIP3 is -4dBm. The layout of LNA-Mixer for one-chip design in a $0.18-{\mu}m$ TSMC process has 2.6mm ${\times}$ 1.3mm size.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.6
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• pp.514-520
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• 2002

In this paper, the study of a design and fabrication of the receiver MMIC mixer for L-band application is described. The mixer is composed of active LO and RF balun to integrate on a chip and applied a newly proposed bias circuit to compensate the process variations of active devices. The conversion gain of the mixer is -14 dB, IIP3 is approximately 4 dBm and port-to-port isolation is over 25 dB. The newly proposed bias circuit is composed of a few FETs and resistors, and can compensate the variation of the threshold voltage by the process variations, temperature changes and etc. The designed chip size is $1.4\;mm{\times}1.4\;mm$.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.4A
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• pp.415-422
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• 2004

DSRC provides high speed radio link between Road Side Equipment and On-Board Equipment within the narrow communication area. In this paper, a 5.8 GHz down-conversion mixer for DSRC communication system was designed and fabricated using 0.8 ${\mu}{\textrm}{m}$ SiGe HBT process technology and RF/LO matching circuits, RF/LO input balun circuits, and If output balun circuit were all integrated on chip. The chip size of fabricated mixer was 1.9 mm${\times}$1.3 mm and the measured performance was 7.5 ㏈ conversion gain, －2.5 ㏈m input IP3, 46 ㏈ LO to RF isolation, 56 ㏈ LO to IF isolation, current consumption of 21 mA for 3.0 V supply voltage.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.4A
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• pp.350-357
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• 2005

DSRC provides high speed radio link between Road Side Equipment and On-Board Equipment within the narrow communication area. In this paper, a 5.8 GHz up-conversion mixer for DSRC communication system was designed and fabricated using 0.8 m SiGe HBT process technology and IF/LO/RF matching circuits, IF/LO input balun circuits, and RP output balun circuit were all integrated on chip. The chip size of fabricated mixer was $2.7mm\times1.6mm$ and the measured performance was 3.5 dB conversion gain, -12.5 dBm output IP3, 42 dB LO to If isolation, 38 dB LO to RF isolation, current consumption of 29 mA for 3.0 V supply voltage.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.11 s.102
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• pp.1114-1122
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• 2005

In this paper, the study of a design, fabrication and measurement of the receiver MMIC LNA, mixer for S-band application is described. The LNA is designed by 2-stage common source. The mixer is composed of active LO and RF balun to integrate on a chip and applied a newly proposed bias circuit to compensate the process variations of active devices. The LNA has 15.51 dB-gain and 1.02dB-Noise Figure at 2.1 GHz. The conversion gain of the mixer is -12 dB, IIP3 is approximately 4.25 dBm and port-to-port isolation is over 25 dB. The newly proposed bias circuit is composed of a few FETs and resistors, and can compensate the variation of the threshold voltage by the process variations, temperature changes and etc. The designed chip size is $1.2[mm]\times1.4[mm]$.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.4
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• pp.1-8
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• 1998

An MMIC single-balanced upconverting mixer for PCS application has been successfully developed using an MMIC process employed by 1 .mu. ion implanted GaAs MESFET and passive lumped elements consisting of spiral inductor, Si3N4 MIM capacitors and NiCr resistors. The configuration of the mixer presented in this paper is two balanced cascode FET mixers with common-source self-bias circuits for single power supply operation. The dimension of the fabricated circuit including two active baluns intermodulation characteristic with two-tone excitation are also measured, showing -28.17 dBc at IF power of -30 dBm.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2018.05a
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• pp.61-62
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• 2018

In this paper, we studied a wideband double-sided dipole antenna operating at 3.5 GHz (WiMAX) band. The each printed dipoles are placed on the both sides of the substrate. It can be easily implemented and is suitable for connection with an active circuit. In order to obtain wideband printed dipole characteristics, thick rectangular shaped dipole is adopted. Feeding Circuit for dipole array and balun were designed for impedance matching with a $50{\Omega}$ microstrip feed line. The antenna is designed by simulation for an operation in the frequency range of 3.4~3.7 GHz Simulation results show that the maximum gain in the 3.5 GHz band is 5.5 dBi and the bandwidth with VSWR less than 2 is about 1 GHz.

• 한국정보통신설비학회:학술대회논문집
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• 2004.08a
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• pp.386-389
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• 2004

This thesis complemented the weak points that the existing theses did not represented a phase characteristic as the equivalent circuit by applying 4-port simulation to DGS (Defected Ground Structure) characteristic and an equivalent circuit, which are the transmission line structure that has the defect made in the ground surface. We used a distribute device and a lumped device, obtained the equivalent circuit by applying the structure of balun to a discontinuous part. An indicated DGS (Defected Ground structure) is a dumbbells-shaped single defect, we indicated satisfying a magnitude and phase characteristics by applying this equivalent circuit.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.30 no.6
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• pp.518-521
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• 2019

In this paper, an active antenna module operating in the 60 GHz band is designed and fabricated by combining a commercial transmitter chip and patch array antenna. The designed module is composed of an antenna PCB and a PCB with a transmitter chip. The frequency-control and bias-control signals are applied to the transmitter chip, using an Arduino kit. A baseband I/Q signal is also applied to the chip. A ring hybrid balun converts the output of the transmitter module to a single output, which is the output of the transmitter chip that outputs a differential output. The output is delivered to the $2{\times}4$ microstrip patch array antenna PCB as a micro-computer connector. The radiation pattern of the millimeter-wave signal of the final output is compared with the simulation results. The measured radiation patterns of the fabricated active antenna module confirm that the positions of the 3 dB beam width and null point agree well with the simulation results.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.2
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• pp.129-135
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• 2010

In this paper, we propose and demonstrate a new four-port BPSK direct conversion receiver based on $0.18\;{\mu}m$ CMOS technology for K-band applications. The proposed direct conversion receiver is composed of two active combiners, an lumped LC balun, two power detectors and an analog decode. The designed direct conversion receiver is successfully demodulated BPSK signal with 40 Mbps in the K-band.