• Proceedings of the Korean Vacuum Society Conference
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• 2000.02a
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• pp.104-104
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• 2000

MOS소자의 크기가 작아짐에 따라 gate 유전막의 두께 또한 얇아져야 한다. 두께가 얇아짐에 따라 gate 유전막으로써 기존의 SiO2는 direct tunneling으로 인해 높은 누설전류를 수반한다. 그래서 높은 유전상술르 가지는 물질들에 대한 연구의 필요성이 대두되고 있다. 그중 CVD-Ta2O5는 차세대 MOSFET소자기술에 있어서 높은 유전상수($\varepsilon$r+25)와 우수한 step coverage 때문에 각광을 받고 있는 물질중에 하나이다. 본 연구에서는 Ta2O5를 gate를 유전막으로 사용하고 RTN처리와 wet oxidation을 접목시켜 이들의 전기적인 특성을 향상시킬 수 있었다. p-형 wafer 위에 D2와 O2를 사용하여 SiO2(100 )를, NH3를 이용하여 Nitridation(10 )을 전처리로써 각각 실시하였고 그 위에 MOCVD방법으로 Ta2O5를 80 성장시켰다. 첫 번째 시편은 45$0^{\circ}C$ 10min동안 wet oxidation을 시켰고, 두 번째 시편은 $700^{\circ}C$ 60sec동안 NH3 분위기에서 RTN 처리를 하였다. 세 번째 시편은 동일조건으로 RTN 처리후 wet oxidation을 하였다. 그 후 각각의 시편을 capacitor를 제작하고 그 전기적 특성을 관찰하였다. Wet oxidation만을 시킨 시편은 as-deposited Ta2O5 시편에 비해서 -1.5V에서 누설전류는 약 2~3 order정도 감소되었고 accumulation 영역에서의 capacitance 값은 oxide층의 성장(5 )을 무시하면 거의 변화하지 않았다. RTN처리만 된 시편의 경우는 -1.5V에서 누설전류는 2~3order 정도 증가되었지만, accumulation 영역에서 capacitance 값은 거의 2qwork 증가하였다. 이 두가지 공정을 접목시킨 즉 RTN 처리후 wet oxidation 처리된 시편의 경우는 as-deposited Ta2O5 시편에 비해서 -1.5V에서 누설전류는 1 order 정도 감소하였고, accumulation 지역에서의 capacitance 값은 약 2배 증가하였다. 즉 as deposited Ta2O5 시편의 accumulation 지역의 capacitance 값은 12.8 fF/um2으로써 그 유효두께는 27.0 이었지만, RTN 처리후에 wet oxidation 시킨 시편의 accumulation 지역의 capacitance값은 21.2fF/um2으로써 그 유효두께는 16.3 이 되었다. 결론적으로 as deposited Ta2O5 시편에 RTN 처리후 wet oxidation을 실시한 결과 capacitance 값이 약 2배정도 증가하였고 누설전류는 약 1 order 정도 감소됨을 확인하였다.

• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.2
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• pp.130-133
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• 2011

A comparative study of two capacitance methods to measure the effective channel length in deep-submicron MOSFETs has been made in detail. Since the reduction of the overlap capacitance in the accumulation region is smaller than the addition of the inner fringe capacitance at zero gate voltage, the capacitance method removing the parasitic capacitance in the accumulation region extracts a more accurate effective channel length than the method removing that at zero gate voltage.

• Journal of Electrochemical Science and Technology
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• v.13 no.4
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• pp.479-485
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• 2022

The power of energy storage devices is characterized by capacitance and the internal resistance. The capacitance is measured on an assumption that the charges are stored at the electrode interface and the electric double layer behaves like an ideal capacitor. However, in most cases, the electric double layer is not ideal so a constant phase element (CPE) is used instead of a capacitor to describe the practical observations. Nevertheless, another problem with the use of the CPE is that CPE does not give capacitance directly. Fortunately, a few methods were suggested to evaluate the effective capacitance in the literature. However, those methods may not be suitable for supercapacitors which are modeled as an equivalent circuit of a CPE and resistor connected in series because the time constant of the equivalent circuit is not clearly studied. In this report, in order to study the time constant of the CPE and find its equivalent capacitor, AC and DC methods are utilized in a complementary manner. As a result, the time constants in the AC and DC domains are compared with digital simulation and a proper equation is presented to calculate the effective capacitance of a supercapacitor, which is extended to an electrochemical system where faradaic and ohmic processes are accompanied by imperfect charge accumulation process.

• Polymer(Korea)
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• v.36 no.4
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• pp.519-524
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• 2012

Capacitance measurements of the polymer light-emitting diodes (PLEDs) with conjugated polyelectrolyte (CPE) electron transporting layers (ETLs) provide important information of device physics for understanding the function of CPEs as ETLs, together with current density-voltage-luminescence measurements. We investigated the counterion-dependent capacitance behaviors that present a highly negative or positive capacitance at the low frequency, and suggested different carrier injection mechanisms. Capacitance model study reveals that the electron injection mechanism can be described either by the dipole alignment scheme or by electronic charge carrier accumulation at the cathode/ETL/emission layer interfaces.

• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.29-32
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• 2000

Meta1-ferroelectric-insulator-semiconductor(MFIS) devices using Pt/LiNbO$_{3}$/AIN/Si structure were successfully fabricated. AIN thin films were made into metal-insulator-semiconductor(MIS) devices by evaporating aluminum in a dot array on the film surface. The dielectric constant of the AIN film calculated from the capacitance in the accumulation region in the capacitance-voltage(C-V ) characteristic is 8. The gate leakage current density of MIS devices using a aluminum electrode showed the least value of 1$\times$10$^{-8A}$ $\textrm{cm}^2$ order at the electric field of 500㎸/cm. A typica] value of the dielectric constant of MFIS device was about 23 derived from 1MHz capacitance-voltage (C-V) measurement and the resistivity of the film at the field of 500㎸/cm was about 5.6$\times$ 10$^{13}$ $\Omega$.cmcm

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.223-224
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• 2005

In this paper, multiple regression analysis of the electrical characteristics for $HfO_2$ thin films grown by metal organic molecular beam epitaxy (MOMBE) was investigated. The electrical properties, such as, the accumulation capacitance and the hysteresis index, are the main factors to determine the characteristics of $HfO_2$ thin films. The input factors on the process are the substrate temperature, Ar gas flow, and $O_2$ gas flow. For statistical analysis, the design of experiments was carried out and the effect plots were used to analyze the manufacturing process. This methodology can predict the electrical characteristics of the thin film growth mechanism related to the process conditions.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.07a
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• pp.743-746
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• 2000

Metal-ferroelectric-insulator-semiconductor(MFIS) devices using Pt/$LiNbO_3$/Si structure were successfully fabricated. The dielectric constant of the AIN film calculated from the capacitance in the accumulation region in the capacitance-voltage(C-V) curve was about 8.2. The gate leakage current density of MIS devices using a aluminum electrode showed the least value of 1$\times$$1O^{-8}$A/$cm^2$ order at the electric field of 500kV/cm. The dielectric constant of $LiNbO_3$film on AIN/Si structure was about 23 derived from 1MHz capacitance-voltage (C-V) measurement and the resistivity of the film at the field of 500kV/cm was about 5.6$\times$ $1O^{13}$ $\Omega$.cm.

• Proceedings of the KIEE Conference
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• 1992.07b
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• pp.820-824
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• 1992

An accurate method for extracting both Si film doping concentration and front or back silicon-to-oxide fixed charge density of fully depleted SOI devices is proposed. The method utilizes the current-to-voltage and capacitance-to-voltage characteristics of both SOI NMOSFET and PMOSFET which have the same doping concentration. The Si film doping concentration and the front or back silicon-to-oxide fixed charge density are extracted by mainpulating the respective threshold voltages of the SOI NMOSFET and PMOSFET according to the back surface condition (accumulation or inversion) and the capacitance-to-voltage characteristics of the SOI PMOSFET. Device simulations show that the proposed method has less than 10% errors for wide variations of the film doping concentration and the front or the back silicon-to-oxide fixed charge density.

• Journal of the Korean Vacuum Society
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• v.4 no.S2
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• pp.156-162
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• 1995

For a stimulating neural electrode, the charge density should be as large as possible to provide adequate stimulation of the nervous system while allowing for miniaturization of the electrode. Since iridium oxide is able to produce high charge densities while preventing undesirable reactions due to charge storage, it has become a promising material for neural prostheses. Successful production of stable Ir and Ir oxide films on various substrates now limits the use of this material. Ir was deposited on two differently prepared surface of (mirror finish, passivation) surgical Ti-6AI-4V with several methods. Ion beam mixing of sputter deposited Ir films on passivated Ti-6AI-4V produced stable and good adherent Ir films. It was found that the increase in charge density of pure Ir on continuous cyclingis due to the accumulation of the oxide phase ( associated with a large surface area) in which the valence state of iridium changes and the double-layer capacitance increases. This study also showed that the double layer capacitance is equally or even more responsible for the high charge density of anodically formed Ir oxide.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.1085-1088
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• 2003

In this work, we fabricated a gas-sensing device based on porous silicon(PS), and its I-V and C-V properties were investigated for sensing alcohol vapor. The structure of the sensor consists of thin Au/Oxidized porous silicon/porous silicon/Silicon/Al, where the silicon substrate is etched anisotropically to be prepared into a membrane shape. As the result, I-V curves showed typical tunneling property, and C-V curves were shaped like those of a MIS (metal-insulator- semiconductor) capacitor, where the capacitance in accumulation was increased with alcohol vapor concentration.