• 제목/요약/키워드: a-SiO:H

검색결과 1,801건 처리시간 0.03초

Reliability of Multiple Oxides Integrated with thin $HfSiO_x$ gate Dielectric on Thick $SiO_2$ Layers

  • Lee, Tae-Ho;Lee, B.H.;Kang, C.Y.;Choi, R.;Lee, Jack-C.
    • 마이크로전자및패키징학회지
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    • 제15권4호
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    • pp.25-29
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    • 2008
  • Reliability and performance in metal gate/high-k device with multiple gate dielectrics were investigated. MOSFETs with a thin $HfSiO_x$ layer on a thermal Si02 dielectric as gate dielectrics exhibit excellent mobility and low interface trap density. However, the distribution of threshold voltages of $HfSiO_x/SiO_2$ stack devices were wider than those of $SiO_2$ and $HfSiO_x$ single layer devices due to the penetration of Hf and/or intermixing of $HfSiO_x$ with underlying $SiO_2$. The results of TZDB and SILC characteristics suggested that a certain portion of $HfSiO_x$ layer reacted with the underlying thick $SiO_2$ layer, which in turn affected the reliability characteristics.

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졸-겔법으로 합성한 TiO2-SiO2 분말의 분광학적 분석 (Spectroscopic Studies on the Preparation of Sol-Gel Derived TiO2-SiO2 Powder)

  • 정미원;염수진;이복임
    • 분석과학
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    • 제18권1호
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    • pp.1-4
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    • 2005
  • 반응 속도를 조절하기 위하여 유기 첨가제인 아세트산을 사용해 치환된 티타늄 이소프로폭사이드를 합성한 뒤 가수분해 시킨 실리콘(IV)에톡사이드와 반응시켜 $TiO_2-SiO_2$ 분말을 얻었다. 반응 과정 동안의 구조 변화와 특징을 NMR과 FT-IR을 통해서 살펴보았다. 열처리 과정을 거친 분말의 FT-IR 결과로부터 상 분리를 관찰하였다.

다결정 실리콘 박막을 사용한 비휘발성 메모리 장치의 OSO 적층구조에 따른 전하 저장량의 증가

  • 백일호;정성욱;이원백;이준신
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2009년도 제38회 동계학술대회 초록집
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    • pp.150-150
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    • 2010
  • 비휘발성 메모리의 구조는 ONO($SiO_2$, $SiN_X$, $SiN_XN_Y$), 혹은 NNO($SiN_X$, $SiN_X$, $SiN_XN_Y$)등으로 구성된 blocking layer, charge storage layer, tunneling layer 등이 일반적이다. 본 연구에서 제작된 OSO구조는charge storage layer를 a-Si을 사용한 것으로, 기존에 사용되던 charge storage layer인 $SiN_x$ 대신에 a-Si:H 를 사용하였다. 최적의 전하 저장층 조건을 알기 위하여 가스비에 따른 raman 및 bandgap 측정, 그리고 C-V 통하여 트랩된 전하 저장량 및 flatband 전압의 shift 값을 측정 및 분석하였다. 실험 결과, bandgap이 작아 band edge 저장 가능하며, SiNx 와 마찬가지로 a-Si:H 내 트랩에 저장이 가능하였다. 또한 $SiO_2$/a-Si:H와 a-Si:H/SiOxNy 계면의 결함 사이트에 전하의 저장되며, bandgap이 작아 트랩 또는 band edge에 위치한 전하들이 높은 bandgap을 가지는 blocking 또는 tunneling layer를 통하여 빠져 나오기 어려운 특성이 있었다. 본 연구에서는 최적의 전하 저장 층 조건을 알기 위하여 가스비에 raman 및 bandgap 측정, 그리고 C-V 통하여 트랩된 flatband 전압의 shift 값을 측정하여 결과를 논의하였다. 또한 OSO 구조의 두께에 있어 MIS 결과와 poly-Si 상에 실제 제작된 NVM 소자의 switching 특성을 논의하였다.

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저온 공정에 의한 a-Si:H/c-Si 이종접합 태양전지 제조 및 동작특성 분석 (Process and Performance Analysis of a-Si:H/c-Si Hetero-junction Solar Sells Prepared by Low Temperature Processes)

  • 임충현;이정철;전상원;김상균;김석기;김동섭;양수미;강희복;이보영;송진수;윤경훈
    • 한국신재생에너지학회:학술대회논문집
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    • 한국신재생에너지학회 2005년도 춘계학술대회
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    • pp.196-200
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    • 2005
  • In this work, we investigated simple Aㅣ/TCO/a-Si:H(n)/c-Si(p)/Al hetero-junction solar cells prepared by low temperature processes, unlike conventional thermal diffused c-Si solar cells. a-Si:H/c-Si hetero-junction solar cells are processed by low temperature deposition of n-type hydrogenated amorphous silicon (a-Si:H) films by plasma-enhanced chemical vapor deposition on textured and flat p-type silicon substrate. A detailed investigation was carried out to acquire optimization and compatibility of amorphous layer, TCO (ZnO:Al) layer depositions by changing the plasma process parameters. As front TCO and back contact, ZnO:Al and AI were deposited by rf magnetron sputtering and e-beam evaporation, respectively. The photovoltaic conversion efficiency under AMI.5 and the quantum efficiency on $1cm^2$ sample have been reported. An efficiency of $12.5\%$ is achieved on hetero-structure solar cells based on p-type crystalline silicon.

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High Temperature Properties of $Si_3N_4-Re$Silicon Oxynitride (Re=Y, Yb, Er, La) Ceramics

  • Park, Heon-Jin;Lee, June-Gunn;Kim, Young-Wook;Cho, Kyeong-Sik
    • The Korean Journal of Ceramics
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    • 제5권3호
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    • pp.211-216
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    • 1999
  • Four different $\beta-Si_3N_4$ ceramics with silicon oxynitrides $[Y_10(SiO_4)_6N_2, Yb_4Si_2N_2O_7, Er_2Si_3N_4O_3, \;and La_{10}(SiO_4)_6N_2$, respectivley] as secondary phases have been fabricated by hot-pressing the $Si_3N_4-Re_4Si_2N_2O_7$ (Re=Y, Yb, Er, and La) compositions at $1820^{\circ}C$ for 2h under a pressure of 25 MPa. The high temperature strength and oxidation behavior of the hot-pressed ceramics were characterized and compared with those of the ceramics fabricated from $Si_3N_4-Si_2O_7$ compositions. The $Si_3N_4-Re_4Si_2N_2O_7$composition investigated herein showed comparable high temperature strength to those from $Si_3N_4-Re_2Si_2O_7$ compositions. Si3N4 ceramics from a $Si_3N_4-Y_4Si_2N_2O_7$ composition showed the highest strength of 877 MPa at $1200^{\circ}C$ among the compositions. All $Si_3N_4$ ceramics investigated herein showed a parabolic weight gain with oxidation time at $1400^{\circ}C$ and the oxidation products of the ceramics were $SiO_2$ and $Re_2Si_2O_7$. The $Si_3N_4-Re_4Si_2N_2O_7$ compositions showed inferior oxidation resistance to those from $Si_3n_4-Re_2Si_2O_7$ compositions, owing to the incompatibility of the secondary crystalline phases of those ceramics with $SiO_2$, the oxidation product of Si3N4.Si3N4 ceramics from a $Si_3N_4-Er_4Si_2N_2O_7$ composition showed the best oxidation resistance of 0.375mg/$\textrm{cm}^2$ after oxidation at $1400^{\circ}C$ for 102 h in air among the compositions.

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Laser CVD $SiO_2$ 막의 Step Coverage에 관한 연구 (Step Coverage of Laser CVD Deposited $SiO_2$ Films)

  • 박종욱;김상욱;천영일;박지순;강희복;성영권
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1991년도 하계학술대회 논문집
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    • pp.155-157
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    • 1991
  • This paper describe a Laser CVD technology which realizes planarized interlevel dielectrics in sub-micron VLSI's. This technology comprises sub-micron gap filling with $SiO_2$ films between metal lines. Laser CVD process conditions have been investigated to improve step coverage of interlevel dielectrics. An ArF(193nm) Excimer Laser was used to excite and dissociate gas phase $SiH_4\;and\;N_2O$ molecules. The Laser CVD by $N_2O\;and \;SiH_4$. mixture gases has realized conformal deposition above the temperature of $300^{\circ}C$, as a result sub-micron gaps were buried with $SiO_2$ films.

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졸-겔법에 의한 Te 미립자분산 SiO2 겔의 특성 (Properties of Te Fine Particle Doped SiO2 Gel by the Sol-Gel Method)

  • 문종수;조범래;강봉상
    • 한국재료학회지
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    • 제12권8호
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    • pp.650-655
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    • 2002
  • $SiO_2$ gels containing dispersed fine Te metal particles have been prepared by the sol- gel method using a starting solution containing Tetraethoxy Silane (Si($OC_2$ $H_{5}$ )$_4$), $H_2$O, Ethylalchol ($C_2$$H_{5}$OH), Nitric Acid ($HNO_3$) and Tellurium Tetracholoride ($TeCl_4$) in a several molar ratio. Gelling time of sols was about 3 days and viscosity of solution was very low about 2~3 cP for 3 days. Heat-treatments of the gel have been performed at 500, 700, 900, 1100 and $1300^{\circ}C$ for 1 hour, respectively. We have investigated TG-DTA, X-ray diffraction patterns and SEM of heat-treatmented gels. The size of Te fine particles dispersed in $SiO_2$ gel was about 0.8~1 $\mu\textrm{m}$ and the shape was almost quadrangle.

적층형 태양전지를 위한 비정질실리콘계 산화막 박막태양전지의 광흡수층 및 반사체 성능 향상 기술 (Advances in Absorbers and Reflectors of Amorphous Silicon Oxide Thin Film Solar Cells for Tandem Devices)

  • 강동원
    • 한국전기전자재료학회논문지
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    • 제30권2호
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    • pp.115-118
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    • 2017
  • Highly photosensitive and wide bandgap amorphous silicon oxide (a-$SiO_x$:H) films were developed at low temperature ranges ($100{\sim}150^{\circ}C$) with employing plasma-enhanced chemical vapor deposition by optimizing $H_2/SiH_4$ gas ratio and $CO_2$ flow. Photosensitivity more than $10^5$ and wide bandgap (1.81~1.85 eV) properties were used for making the a-$SiO_x$:H thin film solar cells, which exhibited a high open circuit voltage of 0.987 V at the substrate temperature of $100^{\circ}C$. In addition, a power conversion efficiency of 6.87% for the cell could be improved up to 7.77% by employing a new n-type nc-$SiO_x$:H/ZnO:Al/Ag triple back-reflector that offers better short circuit currents in the thin film photovoltaic devices.

SIMS를 이용한 SiO2/PSG/SiO2/Al-1%Si 및 SiO2/TEOS/SiO2/Al-1%Si 적층 박막내의 Na 게터링 분석 (Analysis of the Na Gettering in SiO2/PSG/SiO2/Al-1%Si and SiO2/TEOS/SiO2/Al-1%Si Multilevel Thin Films using SIMS)

  • 김진영
    • 한국표면공학회지
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    • 제51권2호
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    • pp.110-115
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    • 2018
  • The Na low temperature gettering in $SiO_2/PSG/SiO_2/Al-1%Si$ and $SiO_2/TEOS/SiO_2/Al-1%Si$ multilevel thin films was investigated using dynamic SIMS(secondary ion mass spectrometry) analysis. DC magnetron sputter, APCVD and PECVD techniques were utilized for the deposition of Al-1%Si thin films, $SiO_2/PSG/SiO_2$ and $SiO_2/TEOS/SiO_2$ passivations, respectively. Heat treatment was carried out at $300^{\circ}C$ for 5 h in air. SIMS depth profiling was used to determine the distribution of Na, Al, Si and other elements throughout the $SiO_2/PSG/SiO_2/Al-1%Si$ and $SiO_2/TEOS/SiO_2/Al-1%Si$ multilevel thin films. XPS was used to analyze chemical states of Si and O elements in $SiO_2$ passivation layers. Na peaks were observed throughout the $PSG/SiO_2$ and $TEOS/SiO_2$ passivation layers on the Al-1%Si thin films and especially at the interfaces. Na low temperature gettering in $SiO_2/PSG/SiO_2/Al-1%Si$ and $SiO_2/TEOS/SiO_2/Al-1%Si$ multilevel thin films is considered to be caused by a segregation type of gettering.

BaTiO3 PTC 써미스터의 미세구조 및 전기적 특성에 대한 SiO2 영향 (The Effect of SiO2 on the Microstructure and Electrical Properties of BaTiO3 PTC Thermistor)

  • 전명표
    • 한국전기전자재료학회논문지
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    • 제26권1호
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    • pp.22-26
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    • 2013
  • PTCR ceramics of $(Ba_{0.998}Sm_{0.002})TiO_3+0.001MnCO_3+xSiO_2$ (x=1, 2, 3, 4, 5, 6 mol%) were fabricated by solid state method. Disk samples of diameter 5 mm and thickness about 1mm were sintered at $1,290^{\circ}C$ for 2 h in reduced atmosphere of $5%H_2-95%N_2$ followed by re-oxidation at $600^{\circ}C$ for 30 min. in $20%O_2-80%N_2$.and their microstructures and electrical properties were investigated with SEM and Multimeter. The color of sintered samples was strongly dependent on $SiO_2$ content showing that the color of samples with $SiO_2$ of 1~2 mol% was gray but that of samples with $SiO_2$ of 4~6 mol% was changed from gray to blue, which seems to be related with the reduction of samples due to the oxygen vacancies created during the sintering in reduced atmosphere. $SiO_2$ content had a great influence on the microstructure and the electrical properties. With increasing $SiO_2$ content, the grain size of samples increased and the resistivity as well as the resistivity jump ($R_{285}/R_{min}$) decreased, which is considered to be attributed to the resistivity change at grain interior and grain boundary due to the fast mass transfer through $SiO_2$ liquide phase during the sintering. Samples with 2 mol% $SiO_2$ has the resistivity of $202{\Omega}cm$ and the resistivity jump of 3.28. It is expected that $SiO_2$ doped $BaTiO_3$ based PTC ceramics can be used for multilayered PTC thermistor due to the resistance to the sintering in reduced atmosphere.