• Title/Summary/Keyword: a comparator

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A Traffic Pattern Matching Hardware for a Contents Security System (콘텐츠 보안 시스템용 트래픽 패턴 매칭 하드웨어)

  • Choi, Young;Hong, Eun-Kyung;Kim, Tae-Wan;Paek, Seung-Tae;Choi, Il-Hoon;Oh, Hyeong-Cheol
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.46 no.1
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    • pp.88-95
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    • 2009
  • This paper presents a traffic pattern matching hardware that can be used in high performance network applications. The presented hardware is designed for a contents security system which is to block various kinds of information drain or intrusion activities. The hardware consists of two parts: the header lookup and string pattern matching parts. For implementing the header lookup part in hardware, the TCAMs(ternary CAMs) are popularly used. Since the TCAM approach is inefficient in terms of the hardware and memory costs and the power consumption, however, we adopt and modify an alternative approach based on the comparator arrays and the HiCuts tree. Our implementation results, using Xilinx FPGA XC4VSX55, show that our design can reduce the usage of the FPGA slices by about 26%, and the Block RAM by about 58%. In the design of string pattern matching part, we design and use a hashing module based on cellular automata, which is hardware efficient and consumes less power by adaptively changing its configuration to reduce the collision rates.

An Efficient Adaptive Loop Filter Design for HEVC Encoder (HEVC 부호화기를 위한 효율적인 적응적 루프 필터 설계)

  • Shin, Seung-yong;Park, Seung-yong;Ryoo, Kwang-ki
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2014.10a
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    • pp.295-298
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    • 2014
  • In this paper, an efficient design of HEVC Adaptive Loop Filter(ALF) for filter coefficients estimation is proposed. The ALF performs Cholesky decomposition of $10{\times}10$ matrix iteratively to estimate filter coefficients. The Cholesky decomposition of the ALF consists of root and division operation which is difficult to implement in a hardware design because it needs to many computation rate and processing time due to floating-point unit operation of large values of the Maximum 30bit in a LCU($64{\times}64$). The proposed hardware architecture is implemented by designing a root operation based on Cholesky decomposition by using multiplexer, subtracter and comparator. In addition, The proposed hardware architecture of efficient and low computation rate is implemented by designing a pipeline architecture using characteristic operation steps of Cholesky decomposition. An implemented hardware is designed using Xilinx ISE 14.3 Vertex-6 XC6VCX240T FPGA device and can support a frame rate of 40 4K Ultra HD($4096{\times}2160$) frames per second at maximum operation frequency 150MHz.

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Amplification and Howling Suppression of Telephonic Speech for the Hearing-Impaired Person (난청인을 위한 전화기 음성증폭 및 하울링 억제)

  • Lee, Sang-Min
    • Journal of Biomedical Engineering Research
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    • v.19 no.6
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    • pp.623-629
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    • 1998
  • To provide sufficient sound to the hearing-impaired person(HIP) who have many difficulty in communication with others using general telephone, big amplification is needed. But big amplification can occur howling as a side effect. In this study we developed the new technique of big amplification without howling, manufactured and estimated the new hearing aid telephone. Telephone speech is divided to three frequency band, amplified respectively and fitted to HIP's hearing ability. The telephone speech frequency is monitored by counter in time domain. The counter transfers the sinusoidal sound to rectangular wave using comparator and counts the number of rectangular wave in a certain time period, that is frequency, to monitor the howling. Telephone have microphone and speaker, which are fitted in a rigid structure and frequency band of telephone sound is limited, so howling occurs in the limited frequency band. If the counter notices that howling conditions happen, microprocessor decreases quickly the gain of the related frequency band. The result of test of our new hearing aid telephone showed that we can amplifiy the sound as much as 40dB, which is meaningful level to many HIP, and make HIP increase their perception ability from 20% to 60.8% in 1 syllable test and from 28.9% to 78% in 2 syllable test.

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An Area-Efficient DC-DC Converter with Poly-Si TFT for System-On-Glass (System-On-Glass를 위한 Poly-Si TFT 소 면적 DC-DC 변환회로)

  • Lee Kyun-Lyeol;Kim Dae-June;Yoo Changsik
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.2 s.332
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    • pp.1-8
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    • 2005
  • An area-efficient DC-DC voltage up-converter in a poly-Si TFT technology for system-on-glass is described which provides low-ripple output. The voltage up-converter is composed of charge-pumping circuit, comparator with threshold voltage mismatch compensation, oscillator, buffer, and delay circuit for multi-phase clock generation. The low ripple output is obtained by multi-phase clocking without increasing neither clock frequency nor filtering capacitor The measurement results have shown that the ripple on the output voltage with 4-phase clocking is 123mV, while Dickson and conventional cross-coupled charge pump has 590mV and 215mV voltage ripple, respectively, for $Rout=100k\Omega$, Cout-100pF, and fclk=1MHz. The filtering capacitor required for 50mV ripple voltage is 1029pF and 575pF for Dickson and conventional cross-coupled structure, for Iout=100uA, and fclk=1MHz, while the proposed multi-phase clocking DC-DC converter with 4-phase and 6-phase clocking requires only 290pF and 157pF, respectively. The efficiency of conventional and the multi-phase clocking DC-DC converter with 4-phase clocking is $65.7\%\;and\;65.3\%$, respectively, while Dickson charge pump has $59\%$ efficiency.

Design of a Voltage Protection Circuit for DC-DC Converter of the Potable Device Application (소형 휴대기기용 DC-DC 변환기를 위한 전압 보호회로 설계)

  • Park, Ho-Jong;Heo, Yun-Seok;Park, Yong-Su;Kim, Nam-Tae;Song, Han-Jung
    • 전자공학회논문지 IE
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    • v.49 no.1
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    • pp.18-23
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    • 2012
  • In this paper, a potable device application for DC-DC converter was designed for voltage protection circuit. Voltage protection circuit to offer the under voltage lock out and over voltage protection consists of a comparator and bais circuits were implemented using. XFAB 1um CMOS process, SPICE simulations was confirmed through the characteristics. Simulation results, under voltage lock out input voltage is 4.8 V higher when the turn-on and, 4.2 V less when turn-off. When the input voltage is low voltage is applied can be used to prevent malfunction of the circuit. Over voltage protection is 3.8 V reference voltage when the output voltage caused by blocking circuit prevents device destruction can be used to improve the stability and reliability. The virtual control circuits of the DC-DC converter connected. According to the results of the abnormal voltage, voltage protection circuit behavior was confirmed. The proposed voltage protection circuit of the DC-DC converter cell is useful are considered.

A Case Study on Performance Analysis of Antimicrobial Copper Film Attaching to Window for Responding to COVID-19 and Others (코로나19 등 대응을 위한 "유리창 부착용 항바이러스 동필름" 성능분석 사례연구)

  • Kim, Seong Je
    • Journal of Korean Society of Disaster and Security
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    • v.14 no.1
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    • pp.23-40
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    • 2021
  • In the era of the global coronal 19 pandemic, there is a risk of cross-infection in hospitals at the stage where treatments and vaccines are currently being developed and marketed, so individuals should enhance their acquired immunity and generalize their living systems by the performance of copper ions in the social environment. In order to prevent the spread of infection, the need for anti-bacterial film and its efficacy were analyzed through anti-viral performance tests based on research and development cases of worldwide and immemorial time. he Korea Construction Research Institute (KCL) has received anti-bacterial performance certification and anti-viral test scores from the "National Approval Performance Certification Agency." At the time, NCCP 43326 Human Corona virus (BetaCoV/Korea/KCDC03/2020), which was approved by the Centers for Disease Control and Prevention, was introduced to ensure that the activity rate of infected cells was satisfied in the anti-viral performance test. Anti-proliferation measures for the Corona 19 virus require a quality clinical trial study comparing the experimental group within the glass space where the antiviral copper film is constructed with the comparator of the same condition without copper film.

Cost Effectiveness Analysis of Different Management Strategies between Best Supportive Care and Second-line Chemotherapy for Platinum-resistant or Refractory Ovarian Cancer

  • Luealon, Phanida;Khempech, Nipon;Vasuratna, Apichai;Hanvoravongchai, Piya;Havanond, Piyalamporn
    • Asian Pacific Journal of Cancer Prevention
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    • v.17 no.2
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    • pp.799-805
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    • 2016
  • Background: There is no standard treatment for patients with platinum-resistant or refractory epithelial ovarian cancer. Single agent chemotherapies have evidence of more efficacy and less toxicity than combination therapy. Most are very expensive, with appreciable toxicity and minimal survival. Since it is difficult to make comparison between outcomes, economic analysis of single-agent chemotherapy regimens and best supportive care may help to make decisions about an appropriate management for the affected patients. Objective: To evaluate the cost effectiveness of second-line chemotherapy compared with best supportive care for patients with platinum-resistant or refractory epithelial ovarian cancer. Materials and Methods: A Markov model was used to estimate the effectiveness and total costs associated with treatments. The hypothetical patient population comprised women aged 55 with platinum-resistant or refractory epithelial ovarian cancer. Four types of alternative treatment options were evaluated: 1) gemcitabine followed by BSC; 2) pegylated liposomal doxorubicin (PLD) followed by BSC; 3) gemcitabine followed by topotecan; and 4) PLD followed by topotecan. Baseline comparator of alternative treatments was BSC. Time horizon of the analysis was 2 years. Health care provider perspective and 3% discount rate were used to determine the costs of medical treatment in this study. Quality-adjusted life-years (QALY) were used to measure the treatment effectiveness. Treatment effectiveness data were derived from the literature. Costs were calculated from unit cost treatment of epithelial ovarian cancer patients at various stages of disease in King Chulalongkorn Memorial Hospital (KCMH) in the year 2011. Parameter uncertainty was tested in probabilistic sensitivity analysis by using Monte Carlo simulation. One-way sensitivity analysis was used to explore each variable's impact on the uncertainty of the results. Results: Approximated life expectancy of best supportive care was 0.182 years and its total cost was 26,862 Baht. All four alternative treatments increased life expectancy. Life expectancy of gemcitabine followed by BSC, PLD followed by BSC, gemcitabine followed by topotecan and PLD followed by topotecan was 0.510, 0.513, 0.566, and 0.570 years, respectively. The total cost of gemcitabine followed by BSC, PLD followed by BSC, gemcitabine followed by topotecan and PLD followed by topotecan was 113,000, 124,302, 139,788 and 151,135 Baht, respectively. PLD followed by topotecan had the highest expected quality-adjusted life-years but was the most expensive of all the above strategies. The incremental cost-effectiveness ratios (ICER) of gemcitabine followed by BSC, PLD followed by BSC, gemcitabine followed by topotecan and PLD followed by topotecan was 344,643, 385,322, 385,856, and 420,299 Baht, respectively. Conclusions: All of the second-line chemotherapy strategies showed certain benefits due to an increased life-year gained compared with best supportive care. Moreover, gemcitabine as second-line chemotherapy followed by best supportive care in progressive disease case was likely to be more effective strategy with less cost from health care provider perspective. Gemcitabine was the most cost-effective treatment among all four alternative treatments. ICER is only an economic factor. Treatment decisions should be based on the patient benefit.

Analysis of Existing Guidelines and Controlled Clinical Trials for Development of [Guideline of Clinical Trials with Herbal Medicinal Products for Colorectal Cancer] (결장직장암 한약제제 임상시험 가이드라인 개발을 위한 한약제제 대조군 임상시험 고찰)

  • Park, Eunjoo;Seong, Sin;Kim, Sungsu;Kim, Jinsung;Park, Jae-Woo;Ko, Seok-Jae;Han, Gajin
    • The Journal of Korean Medicine
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    • v.40 no.1
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    • pp.124-152
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    • 2019
  • Objectives: This study aimed to ascertain what should be considered in the "Guideline for Clinical Trials with Herbal Medicinal Products for Colorectal Cancer" by analyzing the existing guidelines and clinical trials. Methods: The development committee searched guidelines for herbal medicinal products for colorectal cancer that have already been developed. Then, clinical trials for colorectal cancer using herbal medicine were searched. The searched trials were analyzed in terms of inclusion and exclusion of participants, intervention, comparator, outcomes and trial design. Then, we compared the results of our analysis with the regulations and guidelines of the Ministry of Food and Drug Safety in order to identify the issues we will have to consider when making the "Guideline for Clinical Trials with Herbal Medicinal Products for Colorectal Cancer". Several guidelines for anti-tumor agents and clinical trials with herbal medicinal products were searched on the national institution homepage. In addition, 12 articles were searched using a combination of the following search terms: 'colorectal neoplasms', 'herbal medicine', 'Medicine, Korean traditional', 'Medicine, Chinese Traditional', 'medicine, East Asian medicine', 'medicine, Kampo', etc. Results: The characteristics of participants were various, such as people with medical histories of surgeries or recurrent cancers or who complained of chemotherapy-induced side effects. The types of interventions were also various and included decoctions, powders, intravenous fluids, intraperitoneal injections and gargles. Comparators used included placebos and conventional treatments. The outcome measurements used in the studies were quality of life, symptom score, tumor response, and survival duration, etc. Safety was evaluated by recording adverse events. Conclusions: Findings were made by reviewing existing guidelines and comparing them with clinical trials for colorectal cancer and herbal medicinal products. These results will be utilized in the development of the "Guideline for Clinical Trials with Herbal Medicinal Products for Colorectal Cancer".

Hardware Design of High-Performance SAO in HEVC Encoder for Ultra HD Video Processing in Real Time (UHD 영상의 실시간 처리를 위한 고성능 HEVC SAO 부호화기 하드웨어 설계)

  • Cho, Hyun-pyo;Park, Seung-yong;Ryoo, Kwang-ki
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2014.10a
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    • pp.271-274
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    • 2014
  • This paper proposes high-performance SAO(Sample Adaptive Offset) in HEVC(High Efficiency Video Coding) encoder for Ultra HD video processing in real time. SAO is a newly adopted technique belonging to the in-loop filter in HEVC. The proposed SAO encoder hardware architecture uses three-layered buffers to minimize memory access time and to simplify pixel processing and also uses only adder, subtractor, shift register and feed-back comparator to reduce area. Furthermore, the proposed architecture consists of pipelined pixel classification and applying SAO parameters, and also classifies four consecutive pixels into EO and BO concurrently. These result in the reduction of processing time and computation. The proposed SAO encoder architecture is designed by Verilog HDL, and implemented by 180k logic gates in TSMC $0.18{\mu}m$ process. At 110MHz, the proposed SAO encoder can support 4K Ultra HD video encoding at 30fps in real time.

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A Non-Calibrated 2x Interleaved 10b 120MS/s Pipeline SAR ADC with Minimized Channel Offset Mismatch (보정기법 없이 채널 간 오프셋 부정합을 최소화한 2x Interleaved 10비트 120MS/s 파이프라인 SAR ADC)

  • Cho, Young-Sae;Shim, Hyun-Sun;Lee, Seung-Hoon
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.9
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    • pp.63-73
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    • 2015
  • This work proposes a 2-channel time-interleaved (T-I) 10b 120MS/s pipeline SAR ADC minimizing offset mismatch between channels without any calibration scheme. The proposed ADC employs a 2-channel SAR and T-I topology based on a 2-step pipeline ADC with 4b and 7b in the first and second stage for high conversion rate and low power consumption. Analog circuits such as comparator and residue amplifier are shared between channels to minimize power consumption, chip area, and offset mismatch which limits the ADC linearity in the conventional T-I architecture, without any calibration scheme. The TSPC D flip-flop with a short propagation delay and a small number of transistors is used in the SAR logic instead of the conventional static D flip-flop to achieve high-speed SAR operation as well as low power consumption and chip area. Three separate reference voltage drivers for 4b SAR, 7b SAR circuits and a single residue amplifier prevent undesirable disturbance among the reference voltages due to each different switching operation and minimize gain mismatch between channels. High-frequency clocks with a controllable duty cycle are generated on chip to eliminate the need of external complicated high-frequency clocks for SAR operation. The prototype ADC in a 45nm CMOS technology demonstrates a measured DNL and INL within 0.69LSB and 0.77LSB, with a maximum SNDR and SFDR of 50.9dB and 59.7dB at 120MS/s, respectively. The proposed ADC occupies an active die area of 0.36mm2 and consumes 8.8mW at a 1.1V supply voltage.