• Title/Summary/Keyword: Y-capacitors

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Electrochemical Characteristics of Hybrid Capacitor and Pulse Performance of Hybrid Capacitor / Li-ion Battery (Hybrid Capacitor의 전기화학적 특성 및 Hybrid Capacitor / Li-ion Battery의 펄스 방전 특성)

  • Lee, Sun-Young;Kim, Ick-Jun;Moon, Seong-In;Kim, Hyun-Soo
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.18 no.12
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    • pp.1133-1138
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    • 2005
  • In this study, we have prepared, as the pluse power source, a commercially supplied Li-ion battery with a capacity of 700 mAh and AC resistivity of 60 md at 1 kHz and nonaqeous asymmetric hybrid capacitor composed of an activated carbon cathode and MCMB anode, and have examined the electrochemical characteristics of hybrid capacitor and the pulse performances of parallel connected hybrid capacitor/Li-ion battery source. The nonaqueous asymmetric hybrid capacitors constituted with each stack number of pairs composed of the cathode, the porous separator and the anode electrode were housed in Al-laminated film cell. The 10 stacked hybrid capacitor, which was charged and discharged at a constant current at 0.25 $mA/cm^2$ between 3 and 4.3 V, has exhibited the capacitance of 108F and the lowest equivalent series resistance was 32 $m{\Omega}$ at 1 kHz. On the other hand, the enhanced run time of Li-ion battery assisted by the hybrid capacitor was obtained with increasing of current density and pulse width in Pulse mode. The best improvement, $84\;\%$ for hybrid capacitor/Li-ion battery was obtained in the condition of a 7C-rate pulse (100 msec)/0.5C-rate standby/$10\;\%$ duty cycle.

A Fast Locking Phase Locked Loop with Multiple Charge Pumps (다중 전하펌프를 이용한 고속 위상고정루프)

  • Song, Youn-Gui;Choi, Young-Shig;Ryu, Ji-Goo
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.2
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    • pp.71-77
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    • 2009
  • A novel phase-locked loop(PLL) architecture with multiple charge pumps for fast locking has been proposed. The proposed PLL has three charge pumps. The effective capacitance and resistance of the loop filter can be scaled up/down according to the locking status by controlling the direction and magnitude of each charge pump current. The fast locking PLL that changes its loop bandwidth through controlling charge pumps depending on locking status has been designed. The capacitor usually occupying the larger portion of the chip is also minimized with the proposed scheme. Therefore, the PLL size of $990{\mu}m\;{\times}\;670{\mu}m$ including resistors and capacitors at the bandwidth of 29.9KHz has been achieved. It has been fabricated with 3.3V $0.35{\mu}m$ CMOS process. The locking time is less than $6{\mu}s$ with the measured phase noise of -90.45dBc/Hz @1MHz at 851.2MHz output frequency.

Integrated Circuit Implementation and Analysis of a Pulse-type Hodgkin-Huxley Neuron Model (펄스형 호지킨-혁슬리 신경세포 모델의 집적회로 구현 및 분석)

  • Kwon, Bo-Min;Jung, Jin-Woo;Park, Ju-Hong;Lee, Je-Won;Park, Yong-Su;Song, Han-Jung
    • 전자공학회논문지 IE
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    • v.46 no.1
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    • pp.16-22
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    • 2009
  • Integrated circuit of a pulse-type neuron for Hodgkin-Huxley model is implemented in a $0.5{\mu}m$ 1 poly 2 metal CMOS technology. Proposed pulse-type neuron model consist of input stage with summing function and pulse generating block which make neuron pulse above threshold value. Pulse generating circuit consist of several transistors, capacitors and negative resistor with a charge supply function. SPICE simulation results show that neuron pulse is generated above threshold current of 70 nA. Measurements of the fabricated pulse type neuron chip in condition of 5 V power supply are shown and compared with the simulated results.

The TDDB Characteristics of Thin $SiO_2$ with Stress Voltage Polarity (스트레스전압 극성에 따른 얇은 산화막의 TDDB 특성)

  • Kim, Cheon-Soo;Yi, Kyoung-Soo;Nam, Kee-Soo;Lee, Jin-Hyo
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.26 no.5
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    • pp.52-59
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    • 1989
  • The reliability of the thin thermal oxide was investigated by using constant current stress method. Polysilicon gate MOS capacitors with oxide thickness range of 20-25nm were used in this experiment. Automatic measurement and statistical data analysis which were essential in reliability evaluation of VLSI process preformed by HP 9000 computer. Based on TDDB results, defect density, breakdown charge (Qbd) and lifetime of oxide film were evaluated. According to the polarity of the stress, some different characteristics were shown. Defect density was 62/$cm^2$ at negative gate injection. The value of Qbd was about 30C/$cm^2$ at positive gate injection, and about 21C/$cm^2$ at negative. The current density acceleration factor was 1.43$cm^2$/A for negative gate injection, and 1.25$cm^2$/A for positive gate injection.

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Analysis of Current-Voltage Characteristics Caused by Electron Injection in Metal-Oxide-Semiconductor Devices (전자주입에 의해 야기되는 MOS 소자의 전류-전압 특성 분석)

  • Jeon Hyun-Goo;Choi, Sung-Woo;Ahn, Byung-Chul;Roh, Yong-Han
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.37 no.11
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    • pp.25-35
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    • 2000
  • A simple two-terminal cyclic current0voltage(I-V) technique was used to measure the current-transients in metal-oxide-semiconductor capacitors. Distinct charging/discharging currents were measured and analyzed as a function of the hold time, the delay time, the gate polarity during the FNT electron injection, the injection fluence and the annealing time after the injection had stopped. The charge-exchange current was distinguished from total current-transients containing the displacement current components. Charging/discharging current caused by the charge exchange was strongly dependent not only on the density of positive charges in the $SiO_2$, but also on the density of interface traps generated during the FNT electron injection. Several tentative mechanisms were suggested.

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Properties of Low Operating Voltage MFS Devices Using Ferroelectric $LiNbO_3$ Film ($LiNbO_3$ 강유전체 박막을 이용한 저전압용 MFS 디바이스의 특징)

  • Kim, Kwang-Ho;Jung, Soon-Won;Kim, Chae-Gyu
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.36D no.11
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    • pp.27-32
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    • 1999
  • Metal-ferroelectric-semiconductor devices by susing rapid thermal annealed $LiNbO_3/Si$(100) structures were fabricated and demonstrated nonvolatile memory operations. The estimated field-effect electron mobility and transconductance on a linear region of the fabricated FET were about $600cm^2/V{\cdot}s$ and 0.16mS/mm, respectively. The ID-VG characteristics of MFSFET's showed a hysteresis loop due to the ferroelectric nature of the $LiNbO_3 films. The drain current of the on state was more than 4 orders of magnitude larger than the off state current at the same read gate voltage of 0.5V, which means the memory operation of the MFSFET. A write voltage as low as ${\pm}3V$, which is applicable to low power integrated circuits, was used for polarization reversal. The ferroelectric capacitors showed no polarization degradation up to $10^{10}$ switching cycles with the application of symmetric bipolar voltage pulse (peak-to-peak 6V, 50% duty cycle) of 500kHz.

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Design and Fabrication of a Dual-Band Bandpass Filter Using a Dual-Mode Ring Resonator with Two Short-Circuited Stubs for WLAN Application (두 단락 스터브를 갖는 이중 모드 링 공진기를 이용한 WLAN용 이중대역 대역통과 여파기의 설계 및 제작)

  • Choi, Byung-Chang
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.26 no.9
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    • pp.814-820
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    • 2015
  • In this paper, A high selective dual-band bandpass filter was proposed using a dual-mode ring resonator with two short-circuited stubs. For dual-mode resonance, the ring resonator is directly connected with non-orthogonal feed-lines via coupling capacitors. Two short-circuited stubs which are unequal lengths are simultaneously placed at two corners along the two symmetry plane of the ring resonator in order to obtain dual-band responses. Because the feeding angle perturbated ring resonator of the proposed dual-band bandpass filter has the symmetrical structure, Even/Odd mode analysis can be well applied to extract the scattering parameters and transmission zero frequencies. The proposed dual-band bandpass filter was designed and fabricated for WLAN(Wireless Local Area Network) application of IEEE 802.11n standard. The measured results showed a good agreement with the simulation results, and it should be well applied not only for WLAN applications but also for any other communication systems.

A Differential Colpitts-VCO Circuit Suitable for Sub-1V Low Phase Noise Operation (1V 미만 전원 전압에서 저 위상잡음에 적합한 차동 콜피츠 전압제어 발진기 회로)

  • Jeon, Man-Young
    • The Journal of the Korea institute of electronic communication sciences
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    • v.6 no.1
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    • pp.7-12
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    • 2011
  • This paper proposes a differential Colpitts-VCO circuit suitable for low phase noise oscillation at the sub-1V supply voltage. Oscillation with low phase noise at the sub-1V supply voltage is facilitated by employing inductors as the current sources of the proposed circuit. One of the two feedback capacitors of the single-ended Colpitts oscillator in the proposed circuit is replaced with the MOS varactor in order to further reduce the resonator loss. Post-layout simulation results using a $0.18{\mu}m$ RF CMOS technology show that the phase noises at the 1MHz offset frequency of the proposed circuit oscillating at the sub-1V supply voltages of 0.6 to 0.9 V are at least 7 dBc/Hz lower than those of the well-known cross-coupled differential VCO.

The Incremental Delta-Sigma ADC for A Single-Electrode Capacitive Touch Sensor (단일-극 커패시터 방식의 터치센서를 위한 Incremental 델타-시그마 아날로그-디지털 변환기 설계)

  • Jung, Young-Jae;Roh, Jeong-Jin
    • Journal of IKEEE
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    • v.17 no.3
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    • pp.234-240
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    • 2013
  • This paper presents an incremental delta-sigma analog-to-digital converter (ADC) for a single-electrode capacitive touch sensor. The second-order cascade of integrators with distributed feedback (CIFB) delta-sigma modulator with 1-bit quantization was fabricated by a $0.18-{\mu}m$ CMOS process. In order to achieve a wide input range in this incremental delta-sigma analog-to-digital converter, the shielding signal and the digitally controlled offset capacitors are used in front of a converter. This circuit operated at a supply voltage of 2.6 V to 3.7 V, and is suitable for single-electrode capacitive touch sensor for ${\pm}10-pF$ input range with sub-fF resolution.

A Delta Modulation Method by Means of Pair Transistor Circuit (쌍트랜지스터 회로에 의한 정착변조방식)

  • 오현위
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.8 no.2
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    • pp.24-33
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    • 1971
  • A noble method of delta modulation by means of pair transistor circuit having negative resistance charcteristic is presented. An RC parallel circuit is inserted between two eiuitter tarminals of the pair transistor circuit, and their emitters are driven by a square pulsed current source. Basically this is a relaxation oscillator circuit. But when the value of capacitors and resistanc R, and the pulse height of driving source are properly chosen, the RC parallel circuit apparently functions as integrating circuit of driviving pulses. Compared with the integrated voltage of capacitor C, a signal input voltatage supplied in series with RC parallel circuit between two emitters makes on or off either of the pair transistors. as the result, one bit pulse is sent out from the coupling resistance terminal of conducted transistor. The circuit diagram used for this experiment is presented, it i% composed with simple mod ulster circuit, differential amplifier and pulse shaping amplifier, The characteristics of the components of this ciruit are discussed, and especially quantumized noise in this delta modulation system is discussed in order to improve the signal to noise ratio which has a close relation with circut constants, quantumized voltage, pulse height and width of driving current source.

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