• Journal of Microbiology
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• v.45 no.2
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• pp.175-178
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• 2007

An endonuclease from Xanthomonas oryzae pathovar oryzae KACC 10331, XorII, was recombinantly produced in Escherichia coli using a T7 system. XorII was purified using a combination of ion exchange and immobilized metal affinity chromatography (IMAC). An optimized washing protocol was carried out on an IMAC in order to obtain a high purity product. The final amount of purified XorII was approximately 2.5 mg/L of LB medium. The purified recombinant XorII was functional and showed the same cleavage pattern as PvuI. The enzyme activity tested the highest at $25^{\circ}C$ in 50 mM NaCl, 10 mM Tris-HCl, 10 mM $MgCl_{2}$, and 1 mM dithiothreitol at a pH of 7.9.

• Korean Journal of Optics and Photonics
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• v.24 no.5
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• pp.262-270
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• 2013

In this paper, we propose a modified optical CBC(Cipher Block Chaining) encryption method using optical XOR logic operations. The proposed method is optically implemented by using dual encoding and a free-space interconnected optical logic gate technique in order to process XOR operations in parallel. Also, we suggest a CBC encryption/decryption optical module which can be fabricated with simple optical architecture. The proposed method makes it possible to encrypt and decrypt vast two-dimensional data very quickly due to the fast optical parallel processing property, and provides more security strength than the conventional electronic CBC algorithm because of the longer security key with the two-dimensional array. Computer simulations show that the proposed method is very effective in CBC encryption processing and can be applied to even ECB(Electronic Code Book) mode and CFB(Cipher Feedback Block) mode.

• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.337-340
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• 2000

In this paper, we put forth a procedure that target low power logic synthesis based on XOR representation of Boolean functions, and the results of synthesis procedure are a multi-level XOR form with minimum switching activity. Specialty, this paper show a method to extract the common cubes or kernels by Boolean matrix and rectangle covering, and to estimate the power consumption in terms of the extracted common sub-functions.

• Journal of Korea Society of Industrial Information Systems
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• v.13 no.3
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• pp.110-116
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• 2008

In this paper, we proposed an improvement technique of image encryption using binary phase computer generated hologram(BPCGH) and multi exclusive-OR(XOR) operations. For the encryption process, a BPCGH that reconstructs the original image is designed, using an iterative algorithm, and the resulting hologram is regarded as the image to be encrypted. The BPCGH is encrypted through the exclusive-OR operation with the random generated phase key image. Then the encrypted image is divided into several slide images using XOR operations. So, the performance of encryption for the image is improved. For the decryption process, we cascade the encrypted slide images and phase key image and interfere with reference wave. Then decrypted hologram image is transformed into phase information. Finally, the original image is recovered by an inverse Fourier transformation of the phase information. If the slide images are changed, we can get various decrypted BPCGH images. In the proposed security system, without a random generated key image, the original image can not be recovered. And we recover another hologram pattern according to the slide images, so it can be used in the differentiated authorization system.

• The KIPS Transactions:PartC
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• v.18C no.6
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• pp.369-378
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• 2011

To ensure data confidentiality and fine-grained access control in business environment, system model using KP-ABE(Key Policy-Attribute Based Encryption) and PRE(Proxy Re-Encryption) has been proposed recently. However, in previous study, data confidentiality has been effected by decryption right concentrated on cloud server. Also, Yu's work does not consider a access privilege management, so existing work become dangerous to collusion attack between malicious user and cloud server. To resolve this problem, we propose secure system model against collusion attack through dividing data file into header which is sent to privilege manager group and body which is sent to cloud server. And we construct the model of access privilege management using AONT based XOR threshold Secret Sharing, In addition, our scheme enable to grant weight for access privilege using XOR Share. In chapter 4, we differentiate existing scheme and proposed scheme.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.1 s.343
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• pp.13-16
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• 2006

We have proposed and experimentally demonstrated the all-optical composite logic gates with XOR, NOR, OR and NAND functions using SOA-MZI structures to make it possible to simultaneously perform various logical functions. The proposed scheme is robust and feasible for high speed all-optical logic operation with high ER.

• Journal of the Institute of Electronics and Information Engineers
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• v.49 no.12
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• pp.156-163
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• 2012

Recently, Information Hiding Technology are becoming increasingly demanding in the field of international security, military and medical image This paper proposes data hiding technique utilizing parity checker for gray level image. many researches have been adopted LSB substitution and XOR operation in the field of steganography for the low complexity, high embedding capacity and high image quality. But, LSB substitution methods are not secure through it's naive mechanism even though it achieves high embedding capacity. Proposed method replaces LSB of each pixel with XOR(between the parity check bit of other 7 MSBs and 1 Secret bit) within one pixel. As a result, stego-image(that is, steganogram) doesn't result in high image degradation. Eavesdropper couldn't easily detect the message embedding. This approach is applying the concept of symmetric-key encryption protocol onto steganography. Furthermore, 1bit of symmetric-key is generated by the self-reference of each pixel. Proposed method provide more 25% embedding rate against existing XOR operation-based methods and show the effect of the reversal rate of LSB about 2% improvement.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.11A
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• pp.936-944
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• 2003

In this paper, we propose an AND/XOR-based technology mapping method for field programmable gate arrays (FPGAs). Due to the fixed size of the programmable blocks in an FPGA, decomposing a circuit into sub-circuits with appropriate number of inputs can achieve excellent implementation efficiency. Specifically, the proposed technology mapping method is based on Davio expansion theorem to decompose a given Boolean circuit. The AND/XOR nature of the proposed method allows it to operate on XOR intensive circuits, such as error detecting/correcting, data encryption/decryption, and arithmetic circuits, efficiently. We conduct experiments using MCNC benchmark circuits. When using the proposed approach, the number of CLBs (configurable logic blocks) is reduced by 67.6% (compared to speed-optimized results) and 57.7% (compared to area-optimized results), total equivalent gate counts are reduced by 65.5 %, maximum combinational path delay is reduced by 56.7 %, and maximum net delay is reduced by 80.5 % compared to conventional methods.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.8
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• pp.136-142
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• 2013

CRC features have been added to increase the reliability of the data in memory products for high-speed operation, such as DDR4. High-speed memory products in a shortage of internal timing margin increases for the CRC calculation. Because the existing CRC requires many additional circuit area and delay time. In this paper, we show that the matrix-type CRC and a new XOR/XNOR gate could be improved the circuit area and delay time. Proposed matrix-type CRC can detect all odd-bit errors and can detect even number of bit errors, except for multiples of four bits. In addition, a single error in the error correction can reduce the burden of re-transmission of data between memory products and systems due to CRC errors. In addition, the additional circuit area, compared to existing methods can be improved by 57%. The proposed XOR gate which is consists of six transistors, it can reduce the area overhead of 35% compared to the existing CRC, 50% of the gate delay can be reduced.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.7
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• pp.1387-1393
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• 2007

Even if the linearly separable patterns can be classified by the conventional single layer perceptron, the non-linear problems such as XOR can not be classified by it. A fuzzy single layer perceptron can solve the conventional XOR problems by applying fuzzy membership functions. However, in the fuzzy single layer perception, there are a couple disadvantages which are a decision boundary is sometimes vibrating and a convergence may be extremely lowered according to the scopes of the initial values and learning rates. In this paper, for these reasons, we proposed an enhanced fuzzy single layer perceptron algorithm that can prevent from vibration the decision boundary by introducing a bias term and can also reduce the learn time by applying the modified delta rule which include the learning rates and the momentum concept and applying the new linear activation function. Consequently, the simulation results of the XOR and pattern classification problems presented that the proposed method provided the shorter learning time and better convergence than the conventional fuzzy single layer perceptron.