• Title/Summary/Keyword: XOR

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Optimal Stochastic Policies in a network coding capable Ad Hoc Networks

  • Oh, Hayoung
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.8 no.12
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    • pp.4389-4410
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    • 2014
  • Network coding is a promising technology that increases system throughput by reducing the number of packet transmissions from the source node to the destination node in a saturated traffic scenario. Nevertheless, some packets can suffer from end-to-end delay, because of a queuing delay in an intermediate node waiting for other packets to be encoded with exclusive or (XOR). In this paper, we analyze the delay according to packet arrival rate and propose two network coding schemes, iXOR (Intelligent XOR) and oXOR (Optimal XOR) with Markov Decision Process (MDP). They reduce the average delay, even under an unsaturated traffic load, through the Holding-${\chi}$ strategy. In particular, we are interested in the unsaturated network scenario. The unsaturated network is more practical because, in a real wireless network, nodes do not always have packets waiting to be sent. Through analysis and extensive simulations, we show that iXOR and oXOR are better than the Distributed Coordination Function (DCF) without XOR (the general forwarding scheme) and XOR with DCF with respect to average delay as well as delivery ratio.

Design of XOR Gate Based on QCA Universal Gate Using Rotated Cell (회전된 셀을 이용한 QCA 유니버셜 게이트 기반의 XOR 게이트 설계)

  • Lee, Jin-Seong;Jeon, Jun-Cheol
    • Asia-pacific Journal of Multimedia Services Convergent with Art, Humanities, and Sociology
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    • v.7 no.3
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    • pp.301-310
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    • 2017
  • Quantum-dot cellular automata(QCA) is an alternative technology for implementing various computation, high performance, and low power consumption digital circuits at nano scale. In this paper, we propose a new universal gate in QCA. By using the universal gate, we propose a novel XOR gate which is reduced time/hardware complexity. The universal gate can be used to construct all other basic logic gates. Meanwhile, the proposed universal gate is designed by basic cells and a rotated cell. The rotated cell of the proposed universal gate is located at the central of 3-input majority gate structure. In this paper, we propose an XOR gate using three universal gates, although more than five 3-input majority gates are used to design an XOR gate using the 3-input majority gate. The proposed XOR gate is superior to the conventional XOR gate in terms of the total area and the consumed clock because the number of gates are reduced.

Design of Extendable XOR Gate Using Quantum-Dot Cellular Automata (확장성을 고려한 QCA XOR 게이트 설계)

  • You, Young-Won;Kim, Kee-Won;Jeon, Jun-Cheol
    • Journal of Advanced Navigation Technology
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    • v.20 no.6
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    • pp.631-637
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    • 2016
  • Quantum cellular automata (QCA) are one of the alternative technologies that can overcome the limits of complementary metal-oxide-semiconductor (CMOS) scaling. It consists of nano-scale cells and demands very low power consumption. Various circuits on QCA have been researched until these days, and in the middle of the researches, exclusive-OR (XOR) gates are used as error detection and recover. Typical XOR logic gates have a lack of scalable, many clock zones and crossover designs so that they are difficult to implement. In order to overcome these disadvantages, this paper proposes XOR design using majority gate reduced clock zone. The proposed design is compared and analysed to previous designs and is verified the performance.

Multi-layer Structure Based QCA Half Adder Design Using XOR Gate (XOR 게이트를 이용한 다층구조의 QCA 반가산기 설계)

  • Nam, Ji-hyun;Jeon, Jun-Cheol
    • Asia-pacific Journal of Multimedia Services Convergent with Art, Humanities, and Sociology
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    • v.7 no.3
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    • pp.291-300
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    • 2017
  • Quantum-dot cellular automata(QCA) is a computing model designed to be similar to cellular automata, and an alternative technology for next generation using high performance and low power consumption. QCA is undergoing various studies with recent experimental results, and it is one of the paradigms of transistors that can solve device density and interconnection problems as nano-unit materials. An XOR gate is a gate that operates so that the result is true when either one of the logic is true. The proposed XOR gate consists of five layers. The first layer consists of OR gates, the third and fifth layers consist of AND gates, and the second and fourth layers are designed as passages in the middle. The half adder consists of an XOR gate and an AND gate. The proposed half adder is designed by adding two cells to the proposed XOR gate. The proposed half adder consists of fewer cells, total area, and clock than the conventional half adder.

Design Of Minimized Wiring XOR gate based QCA Half Adder (배선을 최소화한 XOR 게이트 기반의 QCA 반가산기 설계)

  • Nam, Ji-hyun;Jeon, Jun-Cheol
    • Asia-pacific Journal of Multimedia Services Convergent with Art, Humanities, and Sociology
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    • v.7 no.10
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    • pp.895-903
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    • 2017
  • Quantum Cellular Automata(QCA) is one of the proposed techniques as an alternative solution to the fundamental limitations of CMOS. QCA has recently been extensively studied along with experimental results, and is attracting attention as a nano-scale size and low power consumption. Although the XOR gates proposed in the previous paper can be designed using the minimum area and the number of cells, there is a disadvantage that the number of added cells is increased due to the stability and the accuracy of the result. In this paper, we propose a gate that supplement for the drawbacks of existing XOR gates. The XOR gate of this paper reduces the number of cells by arranging AND gate and OR gate with square structure and propose a half-adder by adding two cells that serve as simple inverters using the proposed XOR gate. Also This paper use QCADesginer for input and result accuracy. Therefore, the proposed half-adder is composed of fewer cells and total area compared to the conventional half-adder, which is effective when used in a large circuit or when a half - adder is needed in a small area.

Traitor Traceability of Colluded Multimedia Fingerprinting code Using Hamming Distance on XOR Collusion Attack (XOR 공모공격에서 해밍거리를 이용한 공모된 멀티미디어 핑거프린팅 코드의 부정자 추적)

  • Chung, Il Yong;Rhee, Kang Hyeon
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.7
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    • pp.175-180
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    • 2013
  • For the traitor tracing of multimedia content, this paper presents the classification algorithm of XOR collusion attack types using hamming distance, which applies to the colluded fingerprinting codes. The conventional traitor decision hinges on the colluded fingerprinting code used by a correlation coefficient, but the proposed scheme uses hamming distance. While XOR collusion attack employing a correlation coefficient is impossible to trace the traitors about 50% colluders due to a serious XOR linear problem, our method improves the performance of traceability to trace at least 1 traitor using hamming distance, and thus, the functional behavior of the proposed traitor traceability is coincided with Probability Scheme.

5 Gb/s all-optical XOR gate by using semiconductor optical amplifier (Semiconductor Optical Amplifier를 이용한 5 Gb/s전광 XOR논리소자)

  • Kim, Jae-Hun;Byun, Young-Tae;Jhon, Young-Min;Lee, Seok;Woo, Deok-Ha;Kim, Sun-Ho
    • Korean Journal of Optics and Photonics
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    • v.13 no.1
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    • pp.84-87
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    • 2002
  • By using SOA (Semiconductor Optical Amplifier), all-optical XOR gate has been demonstrated at 5 Gb/s in RZ format. Firstly, Boolean AB-and Boolean AB have been obtained. Then, Boolean AB and Boolean AB have been combined to achieve the all-optical XOR gate, which has Boolean logic of AB+AB.

Design of an Energy Efficient XOR-XNOR Circuit (에너지 효율이 우수한 XOR-XNOR 회로 설계)

  • Kim, Jeong Beom
    • Journal of IKEEE
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    • v.23 no.3
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    • pp.878-882
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    • 2019
  • XOR(exclusive-OR)-XNOR(exclusive NOR) circuit is a basic component of 4-2 compressor for high performance arithmetic operation. In this paper we propose an energy efficient XOR-XNOR circuit. The proposed circuit is reduced the internal parasitic capacitance in critical path and implemented with 8 transistors. The circuit produces a perfect output signals for all input combinations. Compared with the previous circuits, the proposed circuit has a 14.5% reduction in propagation delay time and a 1.7% increase in power consumption. Therefore, the proposed XOR-XNOR is reduced power-delay- product (PDP) by 13.1% and energy-delay-product (EDP) by 26.0%. The proposed circuits are implemented with standard CMOS 0.18um technology and verified through SPICE simulation with 1.8V supply voltage.

An Implementation on the XOR-ACC of Multimedia Fingerprinting using Neural Network (신경망을 이용한 멀티미디어 핑거프린팅의 XOR-ACC 구현)

  • Rhee, Kang-Hyeon
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.48 no.6
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    • pp.1-8
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    • 2011
  • In multimedia fingerprinting field, it is many used a code based on BIBD, which has a strong resiliency of anti-collusion. When a collusion-attack code is generated with a logical XOR operation using the code based on BIBD, then some cases are occurred that a colluded code could be generated to the same fingerprint of non-colluder on the other hand, the colluder is decided to the non-colluder so that he would be excepted in the colluder tracing. For solving the serious problem of the wrong decision of the colluder tracing in this paper, XOR-ACC is implemented using multi-layer perceptron neural network among (AND, OR, XOR and Averaging)-ACC by the measured correlation coefficient. Through the experiment, it confirms that XOR-ACC efficiency of multimedia fingerprinting code{7,3,1} based on BIBD is improved to 88.24% from the conventional 41.18%, so that a ratio of the colluder tracing is also improved to 100% from the conventional 53%. As a result, it could be traced and decided completely a sectional colluder and non-colluder about the collusion attacks.

Network Coding delay analysis under Dynamic Traffic in DCF without XOR and DCF with XOR (DCF와 DCF with XOR에서 동적인 트래픽 상태에 따른 네트워크 코딩 지연시간 분석)

  • Oh, Ha-Young;Lee, Junjie;Kim, Chong-Kwon
    • Journal of KIISE:Information Networking
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    • v.36 no.3
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    • pp.251-255
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    • 2009
  • Network coding is a promising technology that increases the system throughput via reducing the number of transmission for a packet delivered from the source node to the destination node. Nevertheless, it suffers from the metrics of end-to-end delay. Network Coding scheme takes more processing delay which occurs as coding node encodes (XOR) a certain number of packets that relayed by the coding node, and more queuing delay which occurs as a packet waits for other packets to be encoded with. Therefore, in this paper, we analyze the dependency of the queuing delay to the arrival rate of each packet. In addition, we analyze and compare the delay in DCF without XOR and DCF with XOR under dynamic traffic.