• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.22 no.6
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• pp.57-62
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• 2022

Recently, fast storage media such as phage-change memory (PCM) emerge, and memory management policies for slow disk storage need to be revisited. In this paper, we propose a new page replacement policy that makes use of PCM as a swap device of virtual memory systems. The proposed policy aims at reducing write traffic to the swap device as well as reducing the number of page faults pursued by traditional page replacement policies. This is because a write operation in PCM is slow and PCM has limited write endurances. Specifically, the proposed policy focuses on the reduction of page faults when the memory load of the system is high, but it aims at reducing write traffic to storage when free memory space is sufficient. Simulation experiments with various memory reference traces show that the proposed policy reduces write traffic to PCM without performance degradations.

• Journal of Internet Computing and Services
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• v.16 no.5
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• pp.19-27
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• 2015

Due to the advantages of fast read/write operation and low power consumption, SSD(Solid State Drive) is now widely adopted as storage device of smart phone, laptop computer, server, etc. However, the shortcomings of SSD such as limited number of write operations and asymmetric read/write operation lead to the problem of shortened life span of SSD. Therefore, the block replacement policy of SSD used as cache for HDD is very important. The existing solutions for improving the lifespan of SSD including the LARC scheme typically employ the LRU algorithm to manage the SSD blocks, which may increase the miss rate in SSD due to the replacement of frequently used block instead of rarely used block. In this paper we propose a novel block replacement scheme which considers the block reuse interval to effectively handle various data read/write patterns. The proposed scheme replaces the block in SSD based on the recency decided by reuse interval and age along with hit ratio. Computer simulation using workload trace files reveals that the proposed scheme consistently improves the performance and lifespan of SSD by increasing the hit ratio and decreasing the number of write operations compared to the existing schemes including LARC.

• Proceedings of the KIEE Conference
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• 2005.05a
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• pp.191-193
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• 2005

Flash memories are one of best media to support portable computer's storages. However, we need to improve traditional data management scheme due to the relatively slow characteristics of flash operation as compared to RAM memory. In order to achieve this goal, we devise a new scheme called Flash Two Phase Locking (F2PL) scheme for efficient data processing. F2PL improves transaction performance by allowing multi version reads and efficiently handling slow flash write/erase operation in lock management process.

• Journal of IKEEE
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• v.5 no.1 s.8
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• pp.43-51
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• 2001

As the density of memories increases, unwanted interference between cells and coupling noise between bit-lines are increased. And testing high-density memories for a high degree of fault coverage can require either a relatively large number of test vectors or a significant amount of additional test circuitry. So far, conventional test algorithms have focused on faults between neighborhood cells, not neighborhood bit-lines. In this paper, a new test algorithm for neighborhood bit-line sensitive faults (NBLSFs) based on the NPSFs(Neighborhood Pattern Sensitive Faults) is proposed. And the proposed algorithm does not require any additional circuit. Instead of the conventional five-cell or nine-cell physical neighborhood layouts to test memory cells, a three-cell layout which is minimum size for NBLSFs detection is used. Furthermore, to consider faults by maximum coupling noise by neighborhood bit-lines, we added refresh operation after write operation in the test procedure(i.e.,$write{\rightarrow}\;refresh{\rightarrow}\;read$). Also, we show that the proposed algorithm can detect stuck-at faults, transition faults, coupling faults, conventional pattern sensitive faults, and neighborhood bit-line sensitive faults.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.12
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• pp.50-59
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• 2000

This paper presents a new SRAM testing method for various faults by monitoring dynamic power supply currents. The peak value of Iddt pulses when the transition write operation is performed, is prominently different from that of a fault free case. Using the observation, a new memory test algorithm is developed which consists of only write operations. The new test algorithm using dynamic power supply current testing, has length of 7n, where n is the number of cells in SRAMs. Compared to the previous March B algorithm, the test length has been reduced by 7/17, and can detect additional hard-to-detect faults.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.1
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• pp.58-64
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• 2013

In this paper, two new flip-flop circuits with PCRAM latches that are FF-1 and FF-2, respectively, are proposed not to waste leakage during sleep time. Unlike the FF-1 circuit that has a normal PCRAM latch, the FF-2 circuit has a selective write latch that can reduce the switching activity in writing operation to save switching power at sleep-in moment. Moreover, a sequential sleep-in control is proposed to reduce the rush current peak that is observed at the sleep-in moment. From the simulation of storing '000000' to the PCRAM latch, we could verify that the proposed FF-1 and FF-2 consume smaller power than the conventional 45-nm FF if the sleep time is longer than $465{\mu}s$ and $95{\mu}s$, respectively, at $125^{\circ}C$. For the rush current peak, the sequential sleep-in control could reduce the current peak as much as 77%.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.2
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• pp.763-767
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• 2005

RAID were proposed to stored double data or used to parity logging methode for error recovery. We describe a technique for automating the execution of redundant disk array operation, including recovery from errors, independent of array architecture. RAID5 provide highly reliable cost effective secondary storage with high performance for read access and large write accessed. It discusses the two architectural techniques used in disk arrays, striping across multiple disks to improve performance and redundancy to improve reliability. In this paper we compare with performance and reliability in RAID5 real/write to file and stripe size. than suggest to algorithm.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.1
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• pp.136-140
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• 2015

Linux environment that is commonly used at embedded systems supports various file systems as Ext2, FAT, NTFS, etc. The file system that is equiped on the embedded system is mostly implemented on mini hard disk or flash memory. The types of the file system of the system make an effect on the performance of a application programs. The factors of file system performance on a same media are block read, block write and block free time. On these factors, block read and block free time are not so different according to the type of file systems. This paper evaluates the performance benchmark of file systems supported by linux about block allocation and write performance. The results obtained from various experiments shows the characteristics of each file system.

• Journal of KIISE:Computing Practices and Letters
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• v.14 no.7
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• pp.713-717
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• 2008

Recently, as the capacity of flash memory increases rapidly, efficient indexing methods become crucial for fast searching of a large volume of data stored in flash memory. Flash memory has its unique characteristics: the write operation is much more costly than the read operation and in-place updating is not allowed. In this paper, we propose a novel index structure that significantly reduces the number of write operations and thus supports efficient searches, insertions, and deletions. We verify the superiority of our method by performing extensive experiments.

• Journal of the Korea Society of Computer and Information
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• v.9 no.2
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• pp.33-40
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• 2004

According as client/server is generalized by development of computer performance and information communication technology, Servers uses local cache for extensibility and early response time, and reduction of limited bandwidth. Consistency of cached data need between server and client this time and much technique are proposed according to this. This Paper improved update frequency cache consistency in old. Existent consistency techniques is disadvantage that response time is late because synchronous declaration or abort step increases because delaying write intention declaration. Techniques that is proposed in this paper did to perform referring update time about object that page request or when complete update operation happens to solve these problem. Therefore, have advantage that response is fast because could run write intention declaration or update by sel_mode electively asynchronously when update operation consists and abort step decreases and clearer selection.