Journal of the Institute of Electronics Engineers of Korea SD (대한전자공학회논문지SD)

The Institute of Electronics and Information Engineers (대한전자공학회)
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An Efficient SRAM Testing using Dynamic Power Supply Current

동적 전원 공급 전류를 이용한 효율적인 SRAM 테스트 기법

  • Yoon, Doe-Hyun (LG Electronics Co.) ;
  • Kim, Hong-Sik (Dept. of Electrical and Electronic Engineering, Yonsei University) ;
  • Kang, Sung-Ho (Dept. of Electrical and Electronic Engineering, Yonsei University)
  • Published : 2000.12.01
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Abstract

This paper presents a new SRAM testing method for various faults by monitoring dynamic power supply currents. The peak value of Iddt pulses when the transition write operation is performed, is prominently different from that of a fault free case. Using the observation, a new memory test algorithm is developed which consists of only write operations. The new test algorithm using dynamic power supply current testing, has length of 7n, where n is the number of cells in SRAMs. Compared to the previous March B algorithm, the test length has been reduced by 7/17, and can detect additional hard-to-detect faults.

본 논문에서는 고집적 SRAM의 다양한 고장을 검출하기 위하여 동적 전원 공급 전류를 관찰하는 방법을 이용하였다. 다양한 고장을 가정하여 고장이 없는 경우와 고장이 발생한 경우 transition write시의 Iddt 펄스의 크기가 크게 다른 것을 이용하여 쓰기 동작만으로 구성된 메모리 테스트 알고리듬을 개발하였다. 새로운 알고리듬은 기존의 March B 알고리듬에 비해서 7/17의 짧은 길이를 가지고도 더 많은 잠재적인 고장을 검출할 수 있다.

Keywords

References

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