• 제목/요약/키워드: Window layers

검색결과 90건 처리시간 0.026초

광기능성 창호시스템의 동절기 채광특성에 관한 목업연구 (Full-scale Mock-up Measurement of a Double Glazed Window System Equipped with Sunlight Controls)

  • 김곤
    • 한국태양에너지학회 논문집
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    • 제28권4호
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    • pp.35-42
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    • 2008
  • Besides genuine skin and clothes, it is called that building is third skin for us. That means the skin of buildings is the most important factor for our man-made environment. The issues in designing the building envelope include the insulation, infiltration, ventilation and bridging in windows. Getting light into the space safely and providing views to outdoor, additionally, are key things with the building envelope design. A deep-rooted preference for full view is still alive with large area of glass. Balcony expansion is legalized in apartment houses, which causes lots of environmental problems. Without balcony space, the adjacent space to unshaded window is exposed to the direct sun. A window can have many layers and the inner space can be utilized with an automatic blind system. Recently, the refurbished version of a double-glazed window system has been developed for the purpose of minimizing energy loss occurred around windows. For the better daylight control with equipped blind system, a set of adjustment technique of blind slats was tested in a mock-up building and recommended the detail operation. Not surprisingly, the optimized blind system can be oriented to enhance the uniformity in light distribution and direct glare from the sky as well..

Pt/Bi3.25La0.75Ti3O12/ZrO2/Si (MFIS)-FET 구조를 위한 ZrO2 Buffer Layer의 영향 (Effect of ZrO2 Buffer Layers for Pt/Bi3.25La0.75Ti3O12/ZrO2/Si (MFIS)-FET Structures)

  • 김경태;김창일
    • 한국전기전자재료학회논문지
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    • 제18권5호
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    • pp.439-444
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    • 2005
  • We investigated the structural and electrical properties of BLT films grown on Si covered with $ZrO_{2}$ buffer layer. The BLT thin film and $ZrO_{2}$ buffer layer were fabricated using a metalorganic decomposition method. The electrical properties of the MFIS structure were investigated by varying thickness of the $ZrO_{2}$ layer. AES and TEM show no interdiffusion and reaction that suppressed using the $ZrO_{2}$ film as a buffer layer The width of the memory window in the C-V curves for the MFIS structure decreased with increasing thickness of the $ZrO_{2}$ layer. It is considered that the memory window width of MFIS is not affected by remanent polarization. Leakage current density decreased by about four orders of magnitude after using $ZrO_{2}$ buffer layer. The results show that the $ZrO_{2}$ buffer layers are prospective candidates for applications in MFIS-FET memory devices.

Deposition of Epitaxial Silicon by Hot-Wall Chemical Vapor Deposition (CVD) Technique and its Thermodynamic Analysis

  • Koh, Wookhyun;Yoon, Deoksun;Pa, ChinHo
    • 한국결정성장학회:학술대회논문집
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    • 한국결정성장학회 1998년도 PROCEEDINGS OF THE 14TH KACG TECHNICAL MEETING AND THE 5TH KOREA-JAPAN EMGS (ELECTRONIC MATERIALS GROWTH SYMPOSIUM)
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    • pp.173-176
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    • 1998
  • Epitaxial Si layers were deposited on n- or p-type Si(100) substrates by hot-wall chemical vapor deposition (CVD) technique using the {{{{ {SiH }_{ 2} {Cl }_{2 } - {H }_{ 2} }}}}chemistry. Thermodynamic calculations if the Si-H-Cl system were carried out to predict the window of actual Si deposition procedd and to investigate the effects of process variables(i.e., the deposition temperature, the reactor pressure, and the source gas molar ratios) on the growth of epitaxial layers. The calculated optimum process conditions were applied to the actual growth runs, and the results were in good agreement with the calculation. The expermentally determined optimum process conditions were found to be the deposition temperature between 900 and 9$25^{\circ}C$, the reactor pressure between 2 and 5 Torr, and source gad molar ration({{{{ {H }_{2 }/ {SiH }_{ 2} {Cl }_{2 } }}}}) between 30 and 70, achieving high-quality epitaxial layers.

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Sputtered Al-Doped ZnO Layers for Cu2ZnSnS4 Thin Film Solar Cells

  • Lee, Kee Doo;Oh, Lee Seul;Seo, Se-Won;Kim, Dong Hwan;Kim, Jin Young
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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    • pp.688-688
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    • 2013
  • Al-doped ZnO (AZO) thin films have attracted a lot of attention as a cheap transparent conducting oxide (TCO) material that can replace the expensive Sn-doped In2O3. In particular, AZO thin films are widely used as a window layer of chalcogenide-based thin film solar cells such as Cu(In,Ga)Se2 and Cu2ZnSnS4 (CZTS). Mostly important requirements for the window layer material of the thin film solar cells are the high transparency and the low sheet resistance, because they influence the light absorption by the activelayer and the electron collection from the active layer, respectively. In this study, we prepared the AZO thin films by RF magnetron sputtering using a ZnO/Al2O3 (98:2wt%) ceramic target, and the effect of the sputtering condition such as the working pressure, RF power, and the working distance on the optical, electrical, and crystallographic properties of the AZO thin films was investigated. The AZO thin films with optimized properties were used as a window layer of CZTS thin film solar cells. The CZTS active layers were prepared by the electrochemical deposition and the subsequent sulfurization process, which is also one of the cost-effective synthetic approaches. In addition, the solar cell properties of the CZTS thin film solar cells, such as the photocurrent density-voltage (J-V) characteristics and the external quantum efficiency (EQE) were investigated.

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$ZrO_2$$CeO_2$ 절연체를 이용한 BLT/절연체/Si 구조의 특성 (Characterization of BLT/insulator/Si structure using $ZrO_2$ and $CeO_2$ insulator)

  • 이정미;김경태;김창일
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2003년도 춘계학술대회 논문집 센서 박막재료 반도체 세라믹
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    • pp.186-189
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    • 2003
  • The MFIS capacitors were fabricated using a metalorganic decomposition method. Thin layers of $ZrO_2$ and $CeO_2$ were deposited as a buffer layer on Si substrate and BLT thin films were used as a ferroelectric layer. The electrical and structural properties of the MFIS structure were investigated. X -ray diffraction was used to determine the phase of the BLT thin films and the quality of the $ZrO_2$ and $CeO_2$ layer. AES show no interdiffusion and the formation of amorphous $SiO_2$ layer is suppressed by using the $ZrO_2$ and $CeO_2$ film as buffer layer between the BLT film and Si substrate. The width of the memory window in the C-V curves for the $BLT/ZrO_2/Si$ and $BLT/CeO_2/Si$ structure is 2.94 V and 1.3V, respectively. The experimental results show that the BLT-based MFIS structure is suitable for non-volatile memory FETs with large memory window.

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(Ga,Al):ZnO 투명전극층의 두께에 따른 CIGS 박막 태양전지의 성능 변화 연구 (Influence of (Ga,Al) : ZnO Window Layer Thickness on the Performance of CIGS Thin Film Solar Cells)

  • 차정화;전찬욱
    • Current Photovoltaic Research
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    • 제5권1호
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    • pp.28-32
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    • 2017
  • In this paper, (Ga,Al):ZnO layers were deposited by sputtering to evaluate the device performance according to the thickness of the layer. As the thickness increased, low transmittance was observed, but the electrical resistance was improved. On the other hand, the highest efficiency was recorded at 400 nm device than a 500 nm of it. Therefore, since the critical thickness exists, it is necessary to set an adequate TCO layer thickness in consideration of the characteristics of the underlying film and the device.

신경망 알고리즘을 이용한 차체용 강판 아크 용접 조건 도출 (Proper Arc Welding Condition Derivation of Auto-body Steel by Artificial Neural Network)

  • 조정호
    • Journal of Welding and Joining
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    • 제32권2호
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    • pp.43-47
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    • 2014
  • Famous artificial neural network (ANN) is applied to predict proper process window of arc welding. Target weldment is variously combined lap joint fillet welding of automotive steel plates. ANN's system variable such as number of hidden layers, perceptrons and transfer function are carefully selected through case by case test. Input variables are welding condition and steel plate combination, for example, welding machine type, shield gas composition, current, speed and strength, thickness of base material. The number of each input variable referred in welding experiment is counted and provided to make it possible to presume the qualitative precision and limit of prediction. One of experimental process windows is excluded for predictability estimation and the rest are applied for neural network training. As expected from basic ANN theory, experimental condition composed of frequently referred input variables showed relatively more precise prediction while rarely referred set showed poorer result. As conclusion, application of ANN to arc welding process window derivation showed comparatively practical feasibility while it still needs more training for higher precision.

CIGS 태양전지의 윈도우 층에 적용 가능한 스퍼터링으로 증착한 AZO 박막의 공정압력의 영향에 따른 특성 연구 (A Study on the Effect of Process Pressure on AZO Thin Films Sputtered for the Windows Layers of CIGS Solar Cells)

  • 윤여탁;조의식;권상직
    • 반도체디스플레이기술학회지
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    • 제16권2호
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    • pp.89-93
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    • 2017
  • For various process pressures, aluminum doped zinc oxide(AZO) films were deposited by in-line pulsed-DC sputtering. The deposited AZO films were optically and electrically investigated and analyzed for the window layers of CIGS solar cell systems. As the pressure was increased from 9 mtorr to 15 mtorr, the thickness of AZO was decreased as a result of scattering and its sheet resistance was rapidly increased. The transmittance of AZO was slightly decreased as the pressure was increased and the calculation of figure of merit(F.O.M) was dependent on the sheet resistance. The structural characteristics of AZO thin films analyzed by X-ray diffraction(XRD) showed no significant dependency according to the pressure.

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CMP 공정을 이용한 Multilevel Metal 구조의 평탄화 연구 (Planarization of Multi-level metal Structure by Chemical Mechanical Polishing)

  • 김상용;서용진;김태형;이우선;김창일
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1997년도 추계학술대회 논문집
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    • pp.456-460
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    • 1997
  • As device sizes are scaled to submicron dimensions, planarization technology becomes increasing1y important, both during device fabrication and during formation of multilevel interconnects and wiring. Chemical Mechanical Polishing (CMP) has emerged recently as a new processing technique for achieving a high degree of planarization for submicron VLSI applications. This paper is presented the results of CMP process window characterization studies for 0.35 micron process with 6 metal layers.

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