• 제목/요약/키워드: Window Layer

검색결과 352건 처리시간 0.026초

An Efficient Transport Protocol for Ad Hoc Networks: An End-to-End Freeze TCP with Timestamps

  • Cho, Sung-Rae;Sirisena, Harsha;Pawlikowski, Krzysztof
    • Journal of Communications and Networks
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    • 제6권4호
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    • pp.376-386
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    • 2004
  • In ad hoc networks, loss-based congestion window progression by the traditional means of duplicate ACKs and timeouts causes high network buffer utilization due to large bursts of data, thereby degrading network bandwidth utilization. Moreover, network-oriented feedbacks to handle route disconnection events may impair packet forwarding capability by adding to MAC layer congestion and also dissipate considerable network resources at reluctant intermediate nodes. Here, we propose a new TCP scheme that does not require the participation of intermediate nodes. It is a purely end-to-end scheme using TCP timestamps to deduce link conditions. It also eliminates spurious reductions of the transmission window in cases of timeouts and fast retransmits. The scheme incorporates a receiver-oriented rate controller (rater), and a congestion window delimiter for the 802.11 MAC protocol. In addition, the transient nature of medium availability due to medium contention during the connection time is addressed by a freezing timer (freezer) at the receiver, which freezes the sender whenever heavy contention is perceived. Finally, the sender-end is modified to comply with the receiver-end enhancements, as an optional deployment. Simulation studies show that our modification of TCP for ad hoc networks offers outstanding performance in terms of goodput, as well as throughput.

전통창호 흡·차음 특성에 관한 실험적 연구 (An experimental study on the sound insulation and sound absorption characteristics of Korean traditional windows)

  • 이태강;김항;송국곤;김선우
    • KIEAE Journal
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    • 제8권5호
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    • pp.3-10
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    • 2008
  • The Korean traditional architecture has developed by adapting to the natural environment, and has successfully created a comfortable indoor settings by using the surrounding natural resources. This is reflected in the building layout, space design and even materials. Our traditional wooden windows adjusting ambient temperature and humidity have both the functions of window and door, although they are clearly divided in the West. The opening and closing method of our traditional windows is similar and their dimensions are shown not to be standardized but diverse in terms of the characteristic of wooden furniture and that of components placed between columns. Thus this study aims to research the sound insulation and absorption performance of traditional windows to be varied with thickness, finishing method of window paper and thickness of air layer. Despite increase of the thickness of window paper, sound absorption was reduced, and the same result was shown when both sides of the structure were finished with thick window paper. The sound insulation performance of the windows could be evaluated to be inappropriate with $R_w$ 0 ~ $R_w$ 14.

HVPE GaN film의 성장과 결함 (The growth and defects of GaN film by hydride vapor phase epitaxy)

  • 이성국;박성수;한재용
    • 한국결정성장학회지
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    • 제9권2호
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    • pp.168-172
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    • 1999
  • HVPE 법으로 sapphire 기판 위에 두께 9$\mu\textrm{m}$의 GaN film을 성장하였다. Sapphire위에 직접 성장된 GaN film은 crack free로 mirror surface를 나타내었고 dislocation density는 $2{\times}10^9/cm^2$이었다.$SiO_2$ mask pattern을 사용하여 성장된 ELO GaN film도 대부분이 mirror surface를 나타내었으나 표면 일부에서 coalescence가 덜 이루어져 stripe 방향으로 hole이 존재하였다. ELO GaN film의 mask 윗부분은 window 부분에 비해 낮은 dislocation density를 나타냈다. 특히 mask center와 window사이 영역에서는 거의 dislocation이 없었다. ELO GaN film의 dislocation density는 평균 $8{\times}10^7/cm^2$.이었다.

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FOUNDATION Fieldbus 프로토콜의 FAS 구현 (Implementation of FAS Protocol of FOUNDATION Fieldbus)

  • 백인찬;홍승호
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2000년도 제15차 학술회의논문집
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    • pp.90-90
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    • 2000
  • The FAS protocol of FOUNDATION Fieldbus playes the roles of interface between Data Link Layer and application layer and establishment of connection between receiver and sender. In this study, the FAS protocol of FOUNDATION Fieldbus was developed. The method of implementation is described in this paper. Software of FAS protocol was implemented by Window-based program and DOS-based program for PC and sensor module, respectively.

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UV임프린트 공정에서 임프린팅 가압력 및 가압시간에 따른 레진 잔막 두께형성에 대한 실험연구 (Study on the Formation of Residual Layer Thickness by Changing Magnitude and Period of UV Imprinting Pressure)

  • 신동혁;장시열
    • Tribology and Lubricants
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    • 제26권5호
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    • pp.297-302
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    • 2010
  • This study is focused on the resin layer formation of UV imprinting process by changing imprinting pressure and period. The mold shape is made for the process of window open over the pattern transfer area and the imprinting period is assigned as the time just before the UV light curing. The residual layer is measured by changing the imprinting period and pressure magnitude, and the measured data of residual layer provides useful information for the design of the process conditions of imprinting processes.

Feasibility of ferroelectric materials as a blocking layer in charge trap flash (CTF) memory

  • Zhang, Yong-Jie;An, Ho-Myoung;Kim, Hee-Dong;Nam, Ki-Hyun;Seo, Yu-Jeong;Kim, Tae-Geun
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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    • pp.119-119
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    • 2008
  • The electrical characteristics of Metal-Ferroelectric-Nitride-Oxide-Silicon (MFNOS) structure is studied and compared to the conventional Silicon-Oixde-Nitride-Oxide-Silicon (SONOS) capacitor. The ferroelectric blocking layer is SrBiNbO (SBN with Sr/Bi ratio 1-x/2+x) with the thickness of 200 nm and is fabricated by the RF sputter. The memory windows of MFNOS and SONOS capacitors with sweep voltage from +10 V to -10 V are 6.9 V and 5.9 V, respectively. The effect of ferroelectric blocking layer and charge trapping on the memory window was discussed. The retention of MFNOS capacitor also shows the 10-years and longer retention time than that of the SONOS capacitor. The better retention properties of the MFNOS capacitor may be attributed to the charge holding effect by the polarization of ferroelectric layer.

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Metal/Ferroelectric/Insulator/Semiconductor 구조의 결정 구조 및 전기적 특성에 관한 연구 (Characteristics of the Crystal Structure and Electrical Properties of Metal/Ferroelectric/Insulator/Semiconductor)

  • 신동석;최훈상;최인훈;이호녕;김용태
    • 한국진공학회지
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    • 제7권3호
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    • pp.195-200
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    • 1998
  • 본 연구에서는 강유전체 박막의 게이트 산화물로 사용한 $Pt/SrBi_2Ta_2O_9(SBT)/CeO_2/Si(MFS)$와 Pt/SBT/Si(MFS) 구조의 결정 구조 및 전기적 성질 의 차이를 연구하였다. XRD 및 SEM 측정 결과 SBT/$CeO_2$/Si박막은 약5nm정도의 $SiO_2$층 이 형성되었고 비교적 평탄한 계면의 미세구조를 가지는 반면, SBT/Si는 각각 약6nm와 7nm정도의 $SiO_2$층과 비정질 중간상층이 형성되었음을 알 수 있다. 즉 CeO2 박막을 완충층 으로 사용함으로써 SBT박막과 Si기판의 상호 반응을 적절히 억제할 수 있음을 확인하였다. Pt/SBT/$CeO_2/Pt/SiO_2$/와 Pt/SBT/Pt/$SiO_2$/Si구조에서 Polarization-Electric field(P-E) 특 성을 비교해 본 결과 CeO2박막의 첨가에 따라 잔류분극값은 감소하였고 항전계값은 증가하 였다. MFIS구조에서 memory window값은 항전계값과 직접적 관련이 있으므로 이러한 항 전계값의 증가는 MFIS구조에서의 memory window값이 증가할 수 있음을 나타낸다. Pt-SBT(140nm)/$CeO_2$(25nm)/Si구조에서 Capacitance-Voltage(C-V) 측정 결과로부터 동작 전압 4-6V에서 memory wondows가 1-2V정도로 나타났다. SBT박막의 두께가 증가할수록 memory window값은 증가하였는데 memory wondows가 1-2V정도로 나타났다. SBT박막의 두께가 증가할수록 memory window값은 증가하였는데 이는 SBT박막에 걸리는 전압강하가 증가하기 때문인 것으로 생각되어진다. Pt/SBT/$CeO_2$/Si의 누설전류는 10-8A/cm2정도였고 Pt/SBT/Si 구조에서는 약10-6A/cm2정도로 약간 높은 값을 나타내었다.

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미세유체칩내 electrode의 opening window형태에 따른 유전전기영동력 특성 규명 (Characterization of Dielectrophoretic Force for the Structural Shapes of Window in Microfluidic Dielectrophoretic Chip)

  • 이재우;곽태준;윤대성;이상우
    • 대한의용생체공학회:의공학회지
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    • 제34권4호
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    • pp.189-196
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    • 2013
  • Dielectrophoresis(DEP) is useful in manipulation and separation of micro-sized particles including biological samples such as bacteria, blood cells, and cancer cells in a micro-fluidic device. Especially, those separation and manipulation techniques using DEP in combination of micro fabrication technique have been researched more and more. Recently, it is revealed that a window structure of insulating layer in microfluidic DEP chip is key role in trap of micro-particles around the window structure. However, the trap phenomenon-driven by DEP force gradient did not fully understand and is still illusive. In this study, we characterize the trap mechanism and efficiency with different shapes of window in a microfluidic DEP chip. To do this characterization, we fabricated 4 different windows shapes such as rhombus, circle, squares, and hexagon inside a micro-fluidic chip, and performed micro-sized particles manipulation experiments as varying the frequency and voltage of AC signal. Moreover, the numerical simulation with the same parameters that were used in the experiment was also performed in order to compare the simulation results and the experimental results. Those comparison shows that both results are closely matched. This study may be helpful in design and development of microfluidic DEP chip for trapping micro-scaled biological particle.

0.5 mm 이내의 두께를 갖는 4층 구조의 스마트 윈도우에 적용되는 전기변색 ECD(electro-chromic device) 필름 제조 및 특성 (Characteristics of an electrochromic ECD (electro-chromic device) film in applications for smart windows with a 4-layer structure, a thickness of 0.5 mm)

  • 김남일;김극태
    • 한국결정성장학회지
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    • 제34권1호
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    • pp.16-21
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    • 2024
  • 전기변색(electrochromic devices, ECD) 방식을 이용하여 외부 전압 인가에 의해 착색된 상태에서 투명한 상태로 색 변화를 일으킬 수 있는 필름 형태의 스마트 윈도우를 제조하였다. 기존 유리 대신 투명 PET 필름을 기재로 사용하였고 ITO/Ag/ITO 전극층, WO3/TIC2 유기변색층, Nafion 전해질층을 차례로 도입한 이후 합지 공정을 통하여 총 두께가 50 ㎛ 정도인 다층 박막 ECD 모듈을 제조하였다. 길이가 80 mm 이상인 대면적의 ECD 모듈을 제조하기 위하여 스퍼터링, 바코팅, 열압축 공정을 최적화하였다. 보통 상태에서 54 % 수준의 투과율을 보였으나 DC 3.5 V의 전압을 인가했을 때 24 %까지 떨어졌으며 색 변화는 육안으로도 확인할 수 있었다. 가역적인 색 변화에 의해 외부 태양광을 선택적으로 차단할 수 있으며 냉난방에 필요한 에너지 저감 측면에서 효과적일 것으로 예상된다.

STS430 기판을 이용한 Flexible CIGS 박막 태양전지 제조 (Fabrication of Flexible CIGS thin film solar cells using STS430 substrate)

  • 정승철;안세진;윤재호;윤경훈
    • 한국신재생에너지학회:학술대회논문집
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    • 한국신재생에너지학회 2008년도 춘계학술대회 논문집
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    • pp.436-437
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    • 2008
  • Flexible CIGS thin film solar cell was fabricated using STS430 plate as a flexible substrate in this work. A diffusion barrier layer of $SiO_2$ thin film was deposited on STS430 substrate by PECVD followed by deposition of double layered Mo back contact. After depositing CIGS absorber layer by co-evaporation, CdS buffer layer by chemical bath deposition, ZnO window layer by RF sputtering and Al electrode by thermal evaporation, the solar cell fabrication processes were completed and its performance was evaluated. Corresponding solar cell showed an conversion efficiency of 8.35 % with $V_{OC}$ of 0.52 V, $J_{SC}$ of 26.06 mA/$cm^2$ and FF of 0.61.

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