• 한국전기전자재료학회논문지
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• 제11권6호
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• pp.436-441
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• 1998

$Pt/SrTiO_3/Pb_x(Zr_{0.52}, Ti_{0.48})O_3/SrTiO_3/Si$ structure was prepared by rf-magnetron sputtering method for use in nondestructive read out ferroelectric RAM(NDRO-FEAM). PBx(Zr_{0.52}Ti_{0.48})O_3}$(PZT) and $SrTiO_3$(STO) films were deposited respectively at the temperatures of $300^{\circ}C and 500^{\circ}C$on p-Si(100) substrate. The role of the STO film as a buffer layer between the PZT film and the Si substrate was studied using X-ray diffraction (XRD), Auger electron spectroscopy (ASE), and scanning electron microscope(SEM). Structural analysis on the interfaces was carried out using a cross sectional transmission electron microscope(TEM). For PZT/Si structure, mostly Pb deficient pyrochlore phase was formed due to the serious diffusion of Pb into the Si substrate. On the other hand, for STO/PZT/STO/Si structure, the PZT film had perovskite phase and larger grain size with a little Pb interdiffusion. the interfaces of the PZT and the STO film, of the STO film and the interface layer and $SiO_2$, and of the $SiO_2$ and the Si substate had a good flatness. Across sectional TEM image showed the existence of an amorphous layer and $SiO_2$ with 7nm thickness between the STO film and the Si substrate. The electrical properties of MIFIS structure was characterized by C-V and I-V measurements. By 1MHz C-V characteristics Pt/STO(25nm)/PZT(160nm)/STO(25nm)/Si structure, memory window was about 1.2 V for and applied voltage of 5 V. Memory window increased by increasing the applied voltage and maximum voltage of memory window was 2 V for V applied. Memory window decreased by decreasing PZT film thickness to 110nm. Typical leakage current was abour $10{-8}$ A/cm for an applied voltage of 5 V.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2011년도 제40회 동계학술대회 초록집
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• pp.403-403
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• 2011

TCO/p/i/n 구조의 비정질 실리콘 박막 태양전지의 제작에 있어서 a-Si 혹은 넓은 밴드갭 물질인 SiOx, SiC 등은 window layer로 주로 사용 되어왔다. 그러나 ${\mu}c$-Si는 우수한 광학적, 전기적 특성에 불구하고 낮은 activation energy에 의한 p/i interface 에서의 band-off set에 의한 정공재결합에 의해 사용되어 지지 못했다. 이러한 재결합은 p/i interface상에 buffer layer를 삽입함으로써 개선되어 질 수 있다. 본 논문에서는 비정질 실리콘 보다 넓은 광학적 밴드갭을 가지는 a-SiOx 박막을 완충층으로 사용하여 p/i 계면에서의 재결합 감소에 대한 시뮬레이션을 수행하였다. a-SiOX 박막 내에 포함 된 산소의 양에 따라 밴드갭을 조절하여 1.8eV~2.0eV 사이의 완충층을 삽입하여 박막태양전지의 개방전압, 단락전류, 효율 등에 끼치는 영향을 ASA 시뮬레이션을 통하여 알아보았다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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• pp.254.2-254.2
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• 2014

The Transmission Fourier Transform Infrared spectroscopy (FTIR) of SiOx charge storage layer with the richest silicon content showed an assignment at peaks around 2000~2300 cm-1. It indicated that the existence of many silicon phases and defect sources in the matrix of the SiOx films. The total hysteresis width is the sum of the flat band voltage shift (${\Delta}VFB$) due to electron and hole charging. At the range voltage sweep of ${\pm}15V$, the ${\Delta}VFB$ values increase of 0.57 V, 1.71 V, and 13.56 V with 1/2, 2/1, and 6/1 samples, respectively. When we increase the gas ratio of SiH4/N2O, a lot of defects appeared in charge storage layer, more electrons and holes are charged and the memory window also increases. The best retention are obtained at sample with the ratio SiH4/N2O=6/1 with 82.31% (3.49V) after 103s and 70.75% after 10 years. The high charge storage in 6/1 device could arise from the large amount of silicon phases and defect sources in the storage material with SiOx material. Therefore, in the programming/erasing (P/E) process, the Si-rich SiOx charge-trapping layer with SiH4/N2O gas flow ratio=6/1 easily grasps electrons and holds them, and hence, increases the P/E speed and the memory window. This is very useful for a trapping layer, especially in the low-voltage operation of non-volatile memory devices.

• 한국신재생에너지학회:학술대회논문집
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• 한국신재생에너지학회 2005년도 춘계학술대회
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• pp.102-108
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• 2005

We have developed highly stabilized (p-i-n)-type protocrystalline silicon (pc-Si:H) multilayer solar cells. To achieve a high conversion efficiency, we applied a double-layer p-type amorphous silicon-carbon alloy $(p-a-Si_{1-x}C_x:H)$ structure to the pc-Si:H multilayer solar cells. The less pronounced initial short wavelength quantum efficiency variation as a function of bias voltage proves that the double $(p-a-Si_{1-x}C_x:H)$ layer structure successfully reduces recombination at the p/i interface. It was found that a natural hydrogen treatment involving an etch of the defective undiluted p-a-SiC:H window layer before the hydrogen-diluted p-a-SiC:H buffer layer deposition and an improvement of the order in the window layer. Thus, we achieved a highly stabilized efficiency of $9.0\%$ without any back reflector.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2004년도 추계학술대회 논문집 전기물성,응용부문
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• pp.183-186
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• 2004

The metal-ferroelectric-insulator-semiconductor(MFIS) capacitors were fabricated using a metalorganic decomposition (MOD)method. The $CeO_2$ thin films were deposited as a buffer layer on Si substrate and $Bi_{3.25}La_{0.75}Ti_3O_{12}$ (BLT) thin films were used as a ferroelectric layer. The electrical and structural properties of the MFIS structure were investigated by varying the $CeO_2$ layer thickness. The width of the memory window in the capacitance-voltage (C-V)curves for the MFIS structure decreased with increasing thickness of the $CeO_2$ layer. Auger electron spectroscopy (AES) and transmission electron microscopy (TEM) show no interdiffusion by using the $CeO_2$ film as buffer layer between the BLT film and Si substrate. The experimental results show that the BLT-based MFIS structure is suitable for non-volatile memory field-effect-transistors (FETs) with large memory window.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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• pp.688-688
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• 2013

Al-doped ZnO (AZO) thin films have attracted a lot of attention as a cheap transparent conducting oxide (TCO) material that can replace the expensive Sn-doped In2O3. In particular, AZO thin films are widely used as a window layer of chalcogenide-based thin film solar cells such as Cu(In,Ga)Se2 and Cu2ZnSnS4 (CZTS). Mostly important requirements for the window layer material of the thin film solar cells are the high transparency and the low sheet resistance, because they influence the light absorption by the activelayer and the electron collection from the active layer, respectively. In this study, we prepared the AZO thin films by RF magnetron sputtering using a ZnO/Al2O3 (98：2wt%) ceramic target, and the effect of the sputtering condition such as the working pressure, RF power, and the working distance on the optical, electrical, and crystallographic properties of the AZO thin films was investigated. The AZO thin films with optimized properties were used as a window layer of CZTS thin film solar cells. The CZTS active layers were prepared by the electrochemical deposition and the subsequent sulfurization process, which is also one of the cost-effective synthetic approaches. In addition, the solar cell properties of the CZTS thin film solar cells, such as the photocurrent density-voltage (J-V) characteristics and the external quantum efficiency (EQE) were investigated.

• 한국기계가공학회지
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• 제13권2호
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• pp.21-27
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• 2014

Recently, various biochip environments have been presented. In this study, a novel transparent film with porous membrane windows, which is an essential component in a co-cultured biochip environment, is fabricated using spin-coating, 3D printing, and electrospinning processes. In detail, a transparent polystyrene film was fabricated by means of the spin-coating process followed bywindow cutting, after which apolycaprolactone-chloroform solution was deposited along the window edge to introduce an adhesion layer between the PS film and the PCL nanofibers. Nanofibers were electrospun into the window region using a direct-write electrospinning method. Consequently, it was demonstrated that the fabricated window film could be used in a co-culture biochip environment.

• 분석과학
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• 제5권4호
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• pp.455-464
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• 1992

본 논문에서는 FT-IR 분광분석법을 이용하여 여러 가지 반응조건에서 기체상 silylation 반응에 의해 생성된 silylated layer의 depth를 비파괴적으로 정량하는 방법을 제안하였다. Silylated layer의 depth는 FT-IR 스펙트럼의 특성 봉우리들(Si-O-ph, Si-C, Si-H)의 흡광도를 바탕 스펙트럼 공제법으로 측정하여 SEM의 두께 측정치와 비교하여 정량하였다. FT-IR 분광분석법을 이용한 Silylated layer의 depth 분석은 비파괴적이고 정량적인 방법으로, 이 방법은 silylation process window를 설정하는 데 적합하다는 것을 알았다.

• 설비공학논문집
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• 제25권11호
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• pp.573-577
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• 2013

An external window directly affects the energy performance of its building. In modern well-insulated buildings, U-values for walls of 0.36 $W/m^2K$ or even lower can be realized. In such buildings, glazing with typical U-value of 2.1 $W/m^2K$ or higher creates thermal weak spots on the facade. The performance of the existing triple glass window has been limited to energy savings and condensation prevention. In this study, the performance of condensation prevention of a vacuum multi-layer glass was analyzed. The final conclusion through mock-up experiments is as follows. The surface temperature of the vacuum multi-layer glass was $2^{\circ}C$ higher, and the temperature difference ratio (TDR) was 0.07 lower, than the corresponding values of the triple glass.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2010년도 제39회 하계학술대회 초록집
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• pp.132-132
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• 2010

In the nano-scale Si processing, patterning processes based on multilevel resist structures becoming more critical due to continuously decreasing resist thickness and feature size. In particular, highly selective etching of the first dielectric layer with resist patterns are great importance. In this work, process window for the infinitely high etch selectivity of silicon oxynitride (SiON) layers and silicon nitride (Si3N4) with EUV resist was investigated during etching of SiON/EUV resist and Si3N4/EUV resist in a CH2F2/N2/Ar dual-frequency superimposed capacitive coupled plasma (DFS-CCP) by varying the process parameters, such as the CH2F2 and N2 flow ratio and low-frequency source power (PLF). It was found that the CH2F2/N2 flow ratio was found to play a critical role in determining the process window for ultra high etch selectivity, due to the differences in change of the degree of polymerization on SiON, Si3N4, and EUV resist. Control of N2 flow ratio gave the possibility of obtaining the ultra high etch selectivity by keeping the steady-state hydrofluorocarbon layer thickness thin on the SiON and Si3N4 surface due to effective formation of HCN etch by-products and, in turn, in continuous SiON and Si3N4 etching, while the hydrofluorocarbon layer is deposited on the EUV resist surface.