• 전력전자학회:학술대회논문집
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• 전력전자학회 2016년도 전력전자학술대회 논문집
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• pp.203-204
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• 2016

무선전력전송은 특성상 수신부에 수신되는 전압이 일정하지 않기 때문에 수신부에 넓은 입력 범위를 갖는 정전압 컨버터가 요구된다. 그 중 Buck-Boost 컨버터는 넓은 입력 범위를 갖기 때문에 무선전력전송 수신부의 정전압 컨버터로 많이 사용 되었다, 본 논문에서는 기존의 Buck-Boost 컨버터의 효율 향상을 위해 Synchronous Buck-Boost 컨버터를 제안하고 시뮬레이션을 통해 두 컨버터를 비교하여 개선된 결과를 확인하였다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2017년도 추계학술대회
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• pp.147-148
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• 2017

• 전력전자학회:학술대회논문집
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• 전력전자학회 2011년도 전력전자학술대회
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• pp.78-80
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• 2011

• 전력전자학회:학술대회논문집
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• 전력전자학회 2012년도 추계학술대회 논문집
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• pp.37-38
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• 2012

• 전력전자학회:학술대회논문집
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• 전력전자학회 2018년도 전력전자학술대회
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• pp.318-319
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• 2018

• 전력전자학회:학술대회논문집
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• 전력전자학회 2010년도 추계학술대회
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• pp.56-57
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• 2010

• 전력전자학회:학술대회논문집
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• 전력전자학회 2019년도 전력전자학술대회
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• pp.89-91
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• 2019

본 논문에서 넓은 입력 범위에 대응 가능한 고효율 SMPS의 구조를 제안한다. 무부하 동작 안정성과 안정적인 기동을 위한 파워 시퀸스 및 제어 기법 또한 제안하고, 제안 SMPS를 제작, 실험한 결과를 발효한다.

• Journal of Power Electronics
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• 제15권6호
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• pp.1673-1681
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• 2015

A low dropout (LDO) regulator with a wide-bandwidth is proposed in this paper. The regulator features a Human Body Model (HBM) 8kV-class high robustness ElectroStatic Discharge (ESD) protection circuit, and two error amplifiers (one with low gain and wide bandwidth, and the other with high gain and narrow bandwidth). The dual error amplifiers are located within the feedback loop of the LDO regulator, and they selectively amplify the signal according to its ripples. The proposed LDO regulator is more efficient in its regulation process because of its selective amplification according to frequency and bandwidth. Furthermore, the proposed regulator has the same gain as a conventional LDO at 62 dB with a 130 kHz-wide bandwidth, which is approximately 3.5 times that of a conventional LDO. The proposed device presents a fast response with improved load and line regulation characteristics. In addition, to prevent an increase in the area of the circuit, a body-driven fabrication technique was used for the error amplifier and the pass transistor. The proposed LDO regulator has an input voltage range of 2.5 V to 4.5 V, and it provides a load current of 100 mA in an output voltage range of 1.2 V to 4.1 V. In addition, to prevent damage in the Integrated Circuit (IC) as a result of static electricity, the reliability of IC was improved by embedding a self-produced 8 kV-class (Chip level) ESD protection circuit of a P-substrate-Triggered Silicon Controlled Rectifier (PTSCR) type with high robustness characteristics.

• 센서학회지
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• 제5권3호
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• pp.9-16
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• 1996

본 논문에서는 고전압 임펄스전압 발생장치의 조작에 의하여 발생하는 과도전압을 측정할 수 있는 용량성분 압기를 실현하였다. 전장센서를 이용한 과도전압측정계는 고속응답의 평판형 전장센서와 광대역 전압버퍼로 구성되었으며, 사용된 전압버퍼(LH0033)의 입력임피던스는 $10^{12}{\Omega}$ 정도로 대단히 높다. 단위계단 응답특성을 파악하기 위하여 새로운 교정방법을 제안하고, 설치조건에 따른 분압비 오차를 검토하였으며, 분압비 오차를 0.5% 이내로 하기 위한 최적설치조건을 제시하였다. 교정실험으로부터 과도전압측정계의 응답시간은 약 15.78 ns이었으며, 주파수대역은 6.37 Hz에서 27.3MHz이다. 따라서 본 측정계로 과도과전압은 물론 상용주파수전압도 신호의 일그러짐 없이 측정이 가능하였다.

• 한국산업융합학회 논문집
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• 제21권6호
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• pp.265-271
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• 2018

DC-DC buck converter is a critical building block in the power management integrated circuit (PMIC) architecture for the portable devices such as cellular phone, personal digital assistance (PDA) because of its power efficiency over a wide range of conversion ratio. To ensure a safe operation, avoid unexpected damages and enhance the reliability of the converter, fully-integrated protection circuits such as over voltage protection (OVP), under voltage lock out (UVLO), startup, and thermal shutdown (TSD) blocks are designed. In this paper, these three fully-integrated protection circuit blocks are proposed for use in the DC-DC buck converter. The buck converter with proposed protection blocks is operated with a switching frequency of 1 MHz in continuous conduction mode (CCM). In order to verify the proposed scheme, the buck converter has been designed using a 180 nm CMOS technology. The UVLO circuit is designed to track the input voltage and turns on/off the buck converter when the input voltage is higher/lower than 2.6 V, respectively. The OVP circuit blocks the buck converter's operation when the input voltage is over 3.3 V, thereby preventing the destruction of the devices inside the controller IC. The TSD circuit shuts down the converter's operation when the temperature is over $85^{\circ}C$. In order to verify the proposed scheme, these protection circuits were firstly verified through the simulation in SPICE. The proposed protection circuits were then fabricated and the measured results showed a good matching with the simulation results.