• Title/Summary/Keyword: Wide Range of Duty Cycle

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Actively Clamped Two-Switch Flyback Converter with High Efficiency

  • Yang, Min-Kwon;Choi, Woo-Young
    • Journal of Power Electronics
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    • v.15 no.5
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    • pp.1200-1206
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    • 2015
  • This paper proposes an actively clamped two-switch flyback converter. Compared to the conventional two-switch flyback converter, the proposed two-switch flyback converter operates with a wide duty cycle range. By using an active-clamp circuit, the proposed converter achieves zero-voltage switching for all of the power switches. Zero-current switching of an output diode is also achieved. Thus, compared with the conventional converter, the proposed converter realizes a higher efficiency with an extended duty cycle. The performance of the proposed converter is verified by the experimental results with use of a 1.0 kW prototype circuit.

High Noise Margin LVDS I/O Circuits for Highly Parallel I/O Environments (다수의 병렬 입.출력 환경을 위한 높은 노이즈 마진을 갖는 LVDS I/O 회로)

  • Kim, Dong-Gu;Kim, Sam-Dong;Hwang, In-Seok
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.44 no.1
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    • pp.85-93
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    • 2007
  • This paper presents new LVDS I/O circuits with a high noise margin for use in highly parallel I/O environments. The proposed LVDS I/O includes transmitter and receiver parts. The transmitter circuits consist of a differential phase splitter and a output stage with common mode feedback(CMFB). The differential phase splitter generates a pair of differential signals which have a balanced duty cycle and $180^{\circ}$ phase difference over a wide supply voltage variation due to SSO(simultaneous switching output) noises. The CMFB output stage produces the required constant output current and maintains the required VCM(common mode voltage) within ${\pm}$0.1V tolerance without external circuits in a SSO environment. The proposed receiver circuits in this paper utilizes a three-stage structure(single-ended differential amp., common source amp., output stage) to accurately receive high-speed signals. The receiver part employs a very wide common mode input range differential amplifier(VCDA). As a result, the receiver improves the immunities for the common mode noise and for the supply voltage difference, represented by Vgdp, between the transmitter and receiver sides. Also, the receiver produces a rail-to-rail, full swing output voltage with a balanced duty cycle(50% ${\pm}$ 3%) without external circuits in a SSO environment, which enables correct data recovery. The proposed LVDS I/O circuits have been designed and simulated with 0.18um TSMC library using H-SPICE.

A Non-isolated DC-DC Converter with High Step-up Ratio and Wide ZVS Range (고승압비와 넓은 ZVS 영역을 갖는 비절연 DC-DC 컨버터)

  • Park, Sung-Sik;Choi, Se-Wan;Choi, Woo-Jin;Lee, Kyo-Beum
    • The Transactions of the Korean Institute of Power Electronics
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    • v.14 no.4
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    • pp.315-322
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    • 2009
  • In the conventional boost converter, the actual duty cycle is limited as the output voltage increases due to increased voltage and current stress of the switch and diode and voltage surge caused by diode reverse recovery. In this paper a new non-isolated boost converter suitable for high gain applications is proposed. The proposed converter has voltage gain of around 6 when the duty cycle is 0.5. Since ZVS is achieved under CCM, the proposed converter has wide ZVS range. Also, voltage ratings of switch and diode are the same as one third of output voltage, and ratings of input and output passive components are reduced due to the interleaving. In addition voltage surge caused by diode reverse recovery is negligible due to ZCS turn-off of diodes. Operating principle of the proposed converter is described and validated through theoretical analysis, simulation and experiment.

40 Gbps RZ Transmission Using Dispersion Compensation of Single-Span in Optical Transmission Links with Multi-Span of Single Mode Fiber

  • Lee, Seong-Real
    • Journal of information and communication convergence engineering
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    • v.9 no.1
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    • pp.32-37
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    • 2011
  • In dispersion management (DM) and optical phase conjugation applied into optical transmission links with multi fiber spans for minimizing the impact of nonlinearity and group velocity (GVD), implementation possibility of DM using only one fiber span for pre- or postcompensation was assessed as a function of duty cycle of RZ pulse and residual dispersion per span (RDPS). It is confirmed that DM with optimal net residual dispersion (NRD) controlled by only one fiber span could be sufficiently applied into optical transmission links, though optimal NRD is more increased than that in transmission links with the general DM scheme of pre- and postcompensation. Thus, it is expected that optical transmission system is simply designed and implemented by applying the proposed DM scheme into real optical transmission links. Also, it is confirmed that the advantageous duty cycle of RZ is 0.5 and RDPS is setting to be small value for the effective transmitting wide signal wavelength range in optical links with optimal NRD controlled by only one fiber span.

Power Supply-Insensitive Gbps Low Power LVDS I/O Circuits (공급 전압 변화에 둔감한 Gbps급 저전력 LVDS I/O회로)

  • Kim, Jae-Gon;Kim, Sam-Dong;Hwang, In-Seok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.6 s.360
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    • pp.19-27
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    • 2007
  • This paper presents power supply-insensitive Gbps low power LVDS I/O circuits. The proposed LVDS I/O has been designed and simulated using 1.8V, $0.18\;{\mu}m$ TSMC CMOS Process. The LVDS I/O includes transmitter and receiver parts. The transmitter circuits consist of a differential phase splitter and an output stage with the switched capacitor common mode feedback(SC-CMFB). The differential phase splitter generates a pair of differential signals which provides a balanced duty $cycle(50{\pm}2%)$ and phase difference$(180{\pm}0.2^{\circ})$ over a wide supply voltage range. Also, $V_{OD}$ voltage is 250 mV which is the smallest value of the permissible $V_{OD}$ range for low power operation. The output buffer maintains the required $V_{CM}$ within the permissible range$(1.2{\pm}0.1V)$ due to the SC-CMFB. The receiver covers a wide input DC offset $range(0.2{\sim}2.6\;V)$ with 38 mV hysteresis and Produces a rail-to-rail output over a wide supply voltage range. Beside, the designed receiver has 38.9 dB gain at 1 GHz, which is higher than conventional receivers.

Phase Locked Loop based Pulse Density Modulation Scheme for the Power Control of Induction Heating Applications

  • Nagarajan, Booma;Sathi, Rama Reddy
    • Journal of Power Electronics
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    • v.15 no.1
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    • pp.65-77
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    • 2015
  • Resonant converters are well suited for induction heating (IH) applications due to their advantages such as efficiency and power density. The control systems of these appliances should provide smooth and wide power control with fewer losses. In this paper, a simple phase locked loop (PLL) based variable duty cycle (VDC) pulse density modulation (PDM) power control scheme for use in class-D inverters for IH loads is proposed. This VDC PDM control method provides a wide power control range. This control scheme also achieves stable and efficient Zero-Voltage-Switching (ZVS) operation over a wide load range. Analysis and modeling of an IH load is done to perform a time domain simulation. The design and output power analysis of a class-D inverter are done for both the conventional pulse width modulation (PWM) and the proposed PLL based VDC PDM methods. The control principles of the proposed method are described in detail. The validity of the proposed control scheme is verified through MATLAB simulations. The PLL loop maintains operation closer to the resonant frequency irrespective of variations in the load parameters. The proposed control scheme provides a linear output power variation to simplify the control logic. A prototype of the class-D inverter system is implemented to validate the simulation results.

A New Asymmetrical PWM Bidirectional Half Bridge Converter for Wide Input Voltage Range Applications (넓은 입력 전압 범위를 갖는 새로운 비대칭 PWM 방식의 양방향 하프브리지 컨버터)

  • Kim, Jeong-Geun;Choi, Se-Wan;Park, Rae-Kwan;Chang, Seo-Geon
    • The Transactions of the Korean Institute of Power Electronics
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    • v.14 no.3
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    • pp.235-242
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    • 2009
  • In this paper a new asymmetrical PWM bidirectional half bridge converter is proposed. The proposed converter has simple structure and wide duty cycle range, and therefore is suitable for applications such as fuel cells which have wide voltage variation. With the proposed asymmetrical PWM method the current rating of switch and transformer is significantly reduced compared to the conventional phase angle control method, and ZVZCS and synchronous rectification can also be achieved. This could result in high efficiency and high power density. The proposed converter is analytically compared to the conventional converter, and the proposed method was validated through the experiment.

MODELING OF DIRECT INJECTION DIESEL ENGINE EMISSIONS FOR A QUASI-DIMENSIONAL MULTI-ZONE SPRAY MODEL

  • Jung, D.;Assanis, D.N.
    • International Journal of Automotive Technology
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    • v.5 no.3
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    • pp.165-172
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    • 2004
  • Phenomenological models for direct injection diesel engine emissions including NO, soot, and HC were implemented into a full engine cycle simulation and validated with experimental data obtained from representative heavy-duty DI diesel engines. The cycle simulation developed earlier by Jung and Assanis (2001) features a quasi-dimensional, multi-zone, spray combustion model to account for transient spray evolution, fuel-air mixing, ignition and combustion. In this study, additional models for HC emissions were newly implemented and the models for NO, soot, and HC emissions were validated against experimental data. It is shown that the models can predict the emissions with reasonable accuracy. However, additional effort may be required to enhance the fidelity of models across a wide range of operating conditions and engine types.

Three-Phase ZVS DC-DC Converter with Low Transformer Turn Ratio for High Step-up and High Power Applications (낮은 변압기 턴비를 갖는 고승압.대전력용 3상 ZVS DC-DC컨버터)

  • Kim, Joon-Geun;Park, Chan-Soo;Choi, Se-Wan;Park, Ga-Woo
    • The Transactions of the Korean Institute of Power Electronics
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    • v.16 no.3
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    • pp.242-249
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    • 2011
  • The proposed converter has easy device selection for high step-up and high power applications since boost half bridge and voltage doubler cells are connected, respectively, in parallel and series in order to increase output power and voltage. Especially, optimized design of high frequency transformers is possible owing to reduced turn ratio and eliminated dc offset, and distributed power through three cores is beneficial to low profile and thermal distribution. The proposed converter does not necessitate start-up circuit and additional clamp circuit due to the use of whole duty range between 0 and 1 and is suitable for applications with wide input voltage range. Also, high efficiency can be achieved since ZVS turn on of switches are achieved in wide duty cycle range and ZCS turn on and off of diodes are achieved. The proposed converter was validated through 5 kW prototype.

A New PWM Power Control Scheme of Class-D Inverter for Induction Heating Jar Application. (IH-Jar용 Class-D 인버터의 새로운 PWM 출력 제어 기법)

  • Choi Won-Suk;Park Nam-Ju;Lee Dong-Yun;Hyun Dong-Seok
    • Proceedings of the KIPE Conference
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    • 2004.07b
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    • pp.519-523
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    • 2004
  • In this paper, a simple power control scheme of Class-D inverter, which is varied duty cycle of fixed frequency to desired output power. It is more suitable and acceptable for high-frequency induction heating (IH) jar applications. The proposed control scheme has the advantages of not only wide power regulation range but also ease to control output power. Also it can achieve the stable and efficient Zero-Voltage-Switching (ZVS) in whole load range. The control principles of proposed method are described in detail and its validity is verified trough simulations results on 38.5kHz IGBT for induction heating rated on 1.6kW with constant frequency variable power.

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