• 제목/요약/키워드: Weighted synthesis

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묵시적 가중 예측기법을 이용한 저 메모리 대역폭 인터 예측기 설계 (Design of a Low Memory Bandwidth Inter Predictor Using Implicit Weighted Prediction Technique)

  • 김진영;류광기
    • 한국정보통신학회논문지
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    • 제16권12호
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    • pp.2725-2730
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    • 2012
  • 본 논문에서는 H.264/AVC 인코더의 성능 향상을 위해 다중 참조 프레임 기법과 묵시적 가중 예측 기법을 이용하고 낮은 외부 메모리 접근율을 위해 이전 참조 프레임 데이터를 재사용하는 인터 예측기 하드웨어 구조를 제안한다. 참조 소프트웨어JM16.0과 비교하여 참조 프레임 접근율이 약 24%만큼 감소하고 참조 영역 메모리가 약 46%만큼 감소하였다. 통합 구조는 Verilog HDL로 설계되고 Magnachip 0.18um공정으로 합성한 결과 게이트 수는 약 2,061k 이고 91Mhz로 동작한다.

Virtual View Generation by a New Hole Filling Algorithm

  • Ko, Min Soo;Yoo, Jisang
    • Journal of Electrical Engineering and Technology
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    • 제9권3호
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    • pp.1023-1033
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    • 2014
  • In this paper, performance improved hole-filling algorithm which includes the boundary noise removing pre-process that can be used for an arbitrary virtual view synthesis has been proposed. Boundary noise occurs due to the boundary mismatch between depth and texture images during the 3D warping process and it usually causes unusual defects in a generated virtual view. Common-hole is impossible to recover by using only a given original view as a reference and most of the conventional algorithms generate unnatural views that include constrained parts of the texture. To remove the boundary noise, we first find occlusion regions and expand these regions to the common-hole region in the synthesized view. Then, we fill the common-hole using the spiral weighted average algorithm and the gradient searching algorithm. The spiral weighted average algorithm keeps the boundary of each object well by using depth information and the gradient searching algorithm preserves the details. We tried to combine strong points of both the spiral weighted average algorithm and the gradient searching algorithm. We also tried to reduce the flickering defect that exists around the filled common-hole region by using a probability mask. The experimental results show that the proposed algorithm performs much better than the conventional algorithms.

기저함수의 가중합을 이용한 음원의 모델링 (Voice Source Modeling Using Weighted Sum-of-Basis-Functions Model)

  • 강상기
    • 한국음향학회:학술대회논문집
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    • 한국음향학회 1998년도 학술발표대회 논문집 제17권 1호
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    • pp.171-174
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    • 1998
  • 본 논문에서는 음성합성(speech synthesis) 및 부호화(coding) 시스템에 있어서 음원(voice source) 모델링에 관한 문제를 살펴보고자 한다. 기존의 음원 모델링 시스템이 가지고 있는 여러 문제들을 극복하고자 기저함수(basis function) 의 가중 합(weighted-sum)으로 음원을 모델링 하는 새로운 기법을 제안하고자 한다. 제안한 방법에서는 음원 파형(voice source waveform)을 적절히 표현하기 위해서 필터뱅크(filter bank)에 기초한 기저함수의 가중 합으로 나타낸다. 다양한 음원 특성을 효과적으로 나타내는 음원 파라미터를 구하기 위하여 EM(estimate maximize)에 기초한 구조에 관해 조사한다. 제안한 방법을 이용하여 다양한 유성음에 대해 실험을 수행하였다. 실험결과 제안한 추정(estimation) 방법 및 모델링 방법을 이용하면 기존의 방법에 비해 더 정확한 음원 파형을 추정할 수 있고, 다양한 음원 특성을 나타낼 수 있다. 또한 음성합성 및 부호화에서도 음성품질(voice quality)를 개선시킬 수 있으리라 기대된다.

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Design of reduced-order controllers in two-degree-of-freedom control systems

  • Nakamura, T.;Obinata, G.;Inooka, H.
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 1988년도 한국자동제어학술회의논문집(국제학술편); 한국전력공사연수원, 서울; 21-22 Oct. 1988
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    • pp.753-758
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    • 1988
  • In this paper, we propose a new method of designing a reduced-order controller for a linear discrete-time system. Firstly, we study a design problem for a two-degree-of-freedom control system with a feedforward controller. Secondly, in order to obtain a reduced-order controller, frequency-weighted least squares approximation problems are considered. Thirdly, we propose a synthesis procedure of a reduced-order controller. Finally, an example is given to illustrate the effectiveness of this proposed method.

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주파수 전달함수 합성법에 의한 선형시스템의 간소화 (A Simplification of Linear System via Frequency Transfer Function Synthesis)

  • 김주식;김종근;유정웅
    • 대한전기학회논문지:시스템및제어부문D
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    • 제53권1호
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    • pp.16-21
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    • 2004
  • This paper presents an approximation method for simplifying a high-order transfer function to a low-order transfer function. A model reduction is based on minimizing the error function weighted by the numerator polynomial of reduced systems. The proposed methods provide better low frequency fit and a computer aided algorithm that estimates the coefficients vector for the numerator and denominator polynomial on the simplified systems from an overdetermined linear system constructed by frequency responses of the original systems. Two examples are given to illustrate the feasibilities of the suggested schemes.

다중포트 메모리를 지원하는 데이터패스 자동 합성 시스템의 설계 (Design of an Automatic Synthesis System for Datapaths Based on Multiport Memories)

  • 이해동;김용노;황선영
    • 전자공학회논문지A
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    • 제31A권7호
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    • pp.117-124
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    • 1994
  • In this pape, we propose a graph-theoretic approach for solving the allocation problem for the synthesis of datapaths based on multiport memories. An efficient algorithm is devised by using the weighted bipartite matching algorithm to assign variables to each port of memory modules. The proposed algorithm assigns program variables into a minimum number of multiport memory modules such that usage of memory elements and interconnection cost can be kept minimal. Experimental results show that the proposed algorithm generates the datapaths with fewer registers in memory modules and less interconnection cost for several benchmarks available from the literatures.

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비선형 시스템의 입/출력 선형화 제어기 설계와 입력 시간-지연 보상 (Controller Synthesis of A Nonlinear System Using Input/Output Linearization and Compensation for Input Time-Delay)

  • 최용호;정길도
    • 대한기계학회:학술대회논문집
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    • 대한기계학회 2004년도 춘계학술대회
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    • pp.768-773
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    • 2004
  • This work deals with the synthesis of discrete-time nonlinear controller for input time-delay existing nonlinear system and proposes a new effective method to compensate the influence of input time-delay. The controller is synthesised by using input/output linearization. Under the circumstance that input time-delay exist, controller have to produce future value that will be needed for system. On account of this reason described, a weighted average predictor of combined states is adopted. Using the discretization via Euler method, numerical simulations about Van der Pol system are performed to evaluate performance of the proposed method.

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주파수영역에서 시가지연을 갖는 선형시스템의 모델축소 (A Model Reduction of Linear Systems with Time Delay in Frequency Domain)

  • 김주식;김종근;유정웅
    • 조명전기설비학회논문지
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    • 제18권6호
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    • pp.176-182
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    • 2004
  • 본 논문에서는 시간지연을 갖는 고차모델을 저차모델로 간소화하기 위한 주파수 전달함수 합성법을 제안한다. 모델축소는 축소시스템의 분자다항식에 의해 가중된 오차함수를 최소화하는 것에 기반을 두고 있다. 제안된 방법은 보다 우수한 저주파수 적합도를 제공한다. 그리고 네 개의 예제가 제안된 방식의 유용성을 나타내기 위해서 주어진다.

Real-time implementation and performance evaluation of speech classifiers in speech analysis-synthesis

  • Kumar, Sandeep
    • ETRI Journal
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    • 제43권1호
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    • pp.82-94
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    • 2021
  • In this work, six voiced/unvoiced speech classifiers based on the autocorrelation function (ACF), average magnitude difference function (AMDF), cepstrum, weighted ACF (WACF), zero crossing rate and energy of the signal (ZCR-E), and neural networks (NNs) have been simulated and implemented in real time using the TMS320C6713 DSP starter kit. These speech classifiers have been integrated into a linear-predictive-coding-based speech analysis-synthesis system and their performance has been compared in terms of the percentage of the voiced/unvoiced classification accuracy, speech quality, and computation time. The results of the percentage of the voiced/unvoiced classification accuracy and speech quality show that the NN-based speech classifier performs better than the ACF-, AMDF-, cepstrum-, WACF- and ZCR-E-based speech classifiers for both clean and noisy environments. The computation time results show that the AMDF-based speech classifier is computationally simple, and thus its computation time is less than that of other speech classifiers, while that of the NN-based speech classifier is greater compared with other classifiers.

Coherent 레이다 신호처리를 위한 저부엽 도플러 필터 뱅크 합성 알고리즘 (Low sidelobe digital doppler filter bank synthesis algorithm for coherent pulse doppler radar)

  • 김태형;허경무
    • 한국통신학회논문지
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    • 제21권3호
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    • pp.612-621
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    • 1996
  • In this paper, we propose the low sidelobe digital FIR doppler filter bank synthesis algorithm through the Gradient Descent method and it can be practially appliable to coherent pulse doppler radar signal processing. This algorithm shows the appropriate calculation of tap coefficients or zeros for FIR transversal fiter which has been employed in radar signal processor. The span of the filters in the filter bank be selected at the desired position the designer want to locate, and the lower sidelobe level that has equal ripple property is achieved than one for which the conventional weithtedwindow is used. Especially, when we implemented filter zeros as design parameters it is possible to make null filter gain at zero frequency intensionally that would be very efficient for the eliminatio of ground clutter. For the example of 10 tap filter synthesis, when filter coefficients or zeros are selected as design parameters the corresponding sidelobelevel is reducedto -70db or -100db respectively and it has good convergent characteristics to the desired sidelobe reference value. The accuracy ofapproach to the reference value and the speed of convergence that show the performance measure of this algorithm are tuned out with some superiority and the fact that the bandwidth of filter appears small with respect to one which is made by conventional weighted window method is convinced. Since the filter which is synthesized by this algorithm can remove the clutter without loss of target signal it strongly contributes performance improvement with which detection capability would be concerned.

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