• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.11a
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• pp.111-115
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• 2002

To understand the discharge characteristics in AC-PDP, it is necessary to study on the wall charge behavior. But, it is difficult to measure the wall charge directly. In this paper, the V-Q Lissajous' figure is used to measure the wall charge indirectly and analyze the wall charge behavior. With the V-Q Lissajous' figure, the discharge characteristics of AC-PDP are studied according to vary driving conditions, such as the frequency, pulse duty ratio, and rising & falling time. As a result, the V-Q Lissajous' figure is used to measure the discharge characteristics of the AC-PDP. It is confirmed that firing initial voltage and firing final voltage for discharge are effected by the aboved variables. Related with the wall voltage generation, it is thought that the difference of the slope at the V-Q Lissajous' figure is caused by charged ions inside the dielectric layer.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.51 no.11
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• pp.541-545
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• 2002

This paper proposes the new narrow erase method to erase wall charges formed in an AC plasma display panel (PDP) cell. In the proposed method, pulse timing of switch at the sustain period is adjusted for inducing, a weak discharge. Then, after the narrow erase, the voltage of the X electrode is set to differ from that of the Y electrode. For the proposed method, the measured maximum address voltage margin was 38.3V at Y_Rest voltage of 100V and sustain voltage of 180${\sim}$185V. However, for the conventional method, in which the X and Y electrodes are set to be of equal voltage after the narrow erase, the measured maximum address voltage margin was 31.3V at Y_Rest voltage of 150V and sustain voltage of 180V. This result shows that the measured maximum voltage margin for the proposed method is about 7V(22%) higher than that for the conventional method.

• Journal of the Korean Institute of Telematics and Electronics
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• v.25 no.12
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• pp.1649-1655
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• 1988

Thermally growon SiO2 films were thermally nitrided in a hot-wall furnace and in a RF-heated cold-wall reactor and their characteristics were investigated by the AES and the C-V dmeasurements. The Auger depth profile show that 200\ulcornerSiO2 film nitrided at 1200\ulcorner, for 2hrs by the hot-wall process has a nitrogen-rich layer near the SiOxNy-Si interface. However the nitrogen-ri h layer is not observed in the case of cold-wall process. The maximum flat-band voltage for the SiO2 films nitrided by the hot-wall process is higher than by the cold-wall process, and the peak value of flat-band voltage for the hot-wall process appears the longer nitridation time than that for the cold-wall process. The SiOxNy-Si interface shift toward the Si substrate for the case of the hot-wall process is larger than that for the cold-wall process.

• Journal of Information Display
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• v.2 no.1
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• pp.24-33
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• 2001

The characteristics of the reset and the address discharges of an alternating current Plasma Display Panel (ac PDP) were studied using 2-dimensional numerical discharge cell simulation. We investigated the wall charge variations during the reset discharge adopting ramping reset pulse and the subsequent addressing discharge. The roles of the ramping reset scheme can be divided into two stages, each electrode gathers wall charges during ramping-up of the initial stage and the built-up wall charges are lost during ramping-down of the later stage. Address discharge does not only change the wall charge distributions on the address and the scan electrodes but also on the sustain electrode. The increase in the wall charges on the sustain electrode was observed with the variation of the applied voltage to the sustain electrode during the address period. The increase of the applied voltage to the sustain electrode during the address period is expected to induce the decrease of the sustain voltage during the display period.

• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.317-320
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• 2003

As a convenient means for the characterization of the wall voltage and wall charge of AC PDPs during the sustain period, an equivalent circuit model for AC PDPs is presented. The equivalent circuit model for AC PDPs consists of capacitors and thyristors. The equivalent circuit model is based on the physical structure of the AC PDP and the I-V characteristic of the discharge space. This equivalent circuit model can be easily implemented in the standard simulators such as SPICE and can easily simulate the variation of the current, charge and voltage involved in AC PDPs as the supply voltage varies.

• Journal of Information Display
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• v.8 no.4
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• pp.5-9
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• 2007

We demonstrate an optically compensated bend (OCB) cell with pixel-isolating polymer wall. The polymer wall is formed by anisotropic phase separation of LCs and UV-curable polymer. The fabricated cell is initially in ${\pi}-twisted$ state so that it shows uniform and fast bend transition without any transition nucleus. The proposed cell has lower driving voltage than conventional OCB cell. Also, the polymer wall provides mechanical stability, hence preventing distortion of display image from external pressure.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.11a
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• pp.128-131
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• 2002

In this paper, we used the V-Q Lissajous‘ figure for studying on the plasma discharge characteristics of the 42 inches AC-PDP. From the V-Q Lissajous‘ figure, we could observe exactly the driving conditions that the self-erasing discharge takes place. At the time, the total wall charges lessened by self-erasing discharge was calculated quantitatively. Beside of the just observation of self-erasing discharge and calculation of the charges lessened, we could find out the optimum driving conditions for inducing the maximum wall charges accumulated on the dielectric layer with measuring the Wall voltage from the V-Q Lissajous' figure.

• Proceedings of the Korean Vacuum Society Conference
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• 1999.02a
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• pp.180-180
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• 1999

• The Transactions of the Korean Institute of Electrical Engineers
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• v.45 no.3
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• pp.386-392
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• 1996

Zinc-Borosilicate is used as a side insulator wall to make high breakdown voltage with one Field Limiting Ring in a power p-n junction device in simulation. It is known that surface charge density can be yield at the interface of Zinc-Borosilicate glass / silicon system. When the glass is used as a side insulator wall, surface charge varied potential distribution and breakdown voltage is improved 1090 V under the same structure.The breakdown voltage under varying the surface charge density has a limit value. When the epitaxial thickness is varied, the position of FLR doesn't influence to the breakdown characteristic not only under non punch-through structure but also under punch-through structure. (author). 7 refs., 12 figs., 2 tabs.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.05b
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• pp.103-107
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• 2000

The relationships between driving voltage and the wall charge distribution in the address period of surface discharge type AC Plasma Display Panel have been investigated. The quantity of wall charge on each electrode are detected simultaneously from the electrode current after applying only one addressing discharge pulse. The wall charge Qy on the scan electrode Y is nearly the sum of Qx on the address electrode X and Qz on the sustain electrode Z. The Qy increased with the driving voltage regardless of the kind of electrode, whereas the address time Td decreased, Qz and Qy are increased considerably with the blocking voltage Vz, whereas Qx is decreased. The increase rate of Qx, Qy and Qz for increase in Vz was $-13{\times}10^{-2}$ (pc/Vz), and $60{\times}10^{-2}$ (pc/Vz) and $70{\times}10^{-2}$(pc/Vz), respectively.