• 반도체디스플레이기술학회지
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• 제9권3호
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• pp.47-51
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• 2010

This paper presents a wafer pre-alignment system which is improved using the image of the entire wafer area. In the previous method, image acquisition for wafer takes about 80% of total pre-alignment time. The proposed system uses only one image of entire wafer area via a high-resolution CMOS camera, and so image acquisition accounts for nearly 1% of total process time. The larger FOV(field of view) to use the image of the entire wafer area worsen camera lens distortion. A camera calibration using high order polynomials is used for accurate lens distortion correction. And template matching is used to find a correct notch's position. The performance of the proposed system was demonstrated by experiments of wafer center alignment and notch alignment.

• 반도체디스플레이기술학회지
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• 제9권1호
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• pp.11-16
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• 2010

Wafer Pre-Alignment is to find the center and the orientation of a wafer and to move the wafer to the desired position and orientation. In this paper, an area camera based pre-aligning method is presented that captures 8 wafer images regularly during 360 degrees rotation. From the images, wafer edge positions are extracted and used to estimate the wafer's center and orientation using least squares circle fitting. These data are utilized for the proper alignment of the wafer. For accurate alignments, camera calibration methods using high order polynomials are used for converting pixel coordinates into real-world coordinates. A complete pre-alignment system was constructed using mechanical and optical components and tested. Experimental results show that alignment of wafer center and orientation can be done with the standard deviation of 0.002 mm and 0.028 degree, respectively.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제18권8호
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• pp.2366-2380
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• 2024

In this study, a high-speed template matching system is proposed for wafer-vision alignment. The proposed system is designed to rapidly locate markers in semiconductor equipment used for wafer-vision alignment. We optimized and implemented a template-matching algorithm for the high-speed processing of high-resolution wafer images. Owing to the simplicity of wafer markers, we removed unnecessary components in the algorithm and designed the system using a field-programmable gate array (FPGA) to implement high-speed processing. The hardware blocks were designed using the Xilinx ZCU104 board, and the pyramid and matching blocks were designed using programmable logic for accelerated operations. To validate the proposed system, we established a verification environment using stage equipment commonly used in industrial settings and reference-software-based validation frameworks. The output results from the FPGA were transmitted to the wafer-alignment controller for system verification. The proposed system reduced the data-processing time by approximately 30% and achieved a level of accuracy in detecting wafer markers that was comparable to that achieved by reference software, with minimal deviation. This system can be used to increase precision and productivity during semiconductor manufacturing processes.

• 한국정밀공학회지
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• 제20권12호
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• pp.105-114
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• 2003

In this study, a dicing machine with vision system was built and an algorithm for automatic alignment was developed for dual camera system. The system had a macro and a micro inspection tool. The algorithm was formulated from geometric relations. When a wafer was put on the cutting stage within certain range, it was inspected by vision system and compared with a standard pattern. The difference between the patterns was analyzed and evaluated. Then, the stage was moved by x, y, $\theta$ axes to compensate these differences. The amount of compensation was calculated from the result of the vision inspection through the automatic alignment algorithm. The stage was moved to the compensated position and was inspected by vision for checking its result again. Accuracy and validity of the algorithm was discussed from these data.

• 한국광학회지
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• 제4권1호
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• pp.15-21
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• 1993

본 연구에서는 설계제작된 KrF 엑시머 레이저 스텝퍼는 광원인 KrF엑시머 레이저, 조명광학계, 축소트영광학계, 정밀구동 웨이퍼 스테이지, 정렬시스템 및 이들을 제어하기 위한 제어계로 구성되어 있다. 본 실험에서 사용한 KrFdprtlaj 레이저는 밴드폭 3pm, 반복주파수 200Hz, 평균축력 3W이고, 5:1 투영렌즈는 N.A. 0.42, 전체 필드영역 $\varphi$21.2mm, 왜곡수차 최대 60nm 이하이다. 또한 정밀구동 웨이퍼 스테이지의 재현성과 해상도는 각각 $\pm$0.08$\mu\textrm{m}$/200mm(3 sigma), 100mm 반경에서 0.05 $\mu\textrm{m}$이다. 자동 초점 시스템은 $\pm$50$\mu\textrm{m}$범위에서 0.1$\mu\textrm{m}$의 해상도를 나타냈으며, 자동수평시스템은 120 arcsec 범위에서 larcsec의 해상도를 나타냈다. OFF-AXIS 정렬방식에서는 0.2$\mu\textrm{m}$의 해상도를 가지며, 두빔의 간섭을 이용한 새로운 TTL 정렬은 0.1$\mu\textrm{m}$의 해상도를 나타냈다. 스텝퍼 패턴 실험결과 SAL603레지스트를 사용하였을 때 웨이퍼의 노광후 열처리 $105^{\circ}C$, 60초에서 0.3$\mu\textrm{m}$ Lines and Spaces(L/S)까지 해상되었으며, 0.34$\mu\textrm{m}$ L/S에서 1$\mu\textrm{m}$의 초점심도를 얻을 수 있었다. 마스크 패턴과 레지스트 패턴의 선형성은 0.4$\mu\textrm{m}$ L/S가지 유지 되었다. 또한 XP-89131레지스트의 경우 노광후 열처리 $110^{\circ}C$, 60초에서 0.34$\mu\textrm{m}$ L/S까지 해상됨을 알수 있었다.

• 한국정밀공학회지
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• 제11권1호
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• pp.150-156
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• 1994

To meet the process requirement of semiconductor device manufacturing, it is necessary to improve the alignment accuracy in exposure equipments. We developed the excimer laser stepper and will describe the methodology for alignment measurement and experimental results. Our wafer alignment system consists of off-axis optics, TTL(Through The Lens) optics and high precision stage. Off-axis alignment utilizes the image processing and /or diffraction from thealign marks of off-centered chip area. On the other hand, TTL alignment can be used for the die-by-die alignment using dual beam interferometry. When only off-axis alignment was used, the experimental alignment error(lml+3 .sigma. ) was 0.26-0.29 .mu. m, and will be reduced down to 0.15 .mu. m by adding TTL alignment.

• 제어로봇시스템학회논문지
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• 제8권9호
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• pp.812-817
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• 2002

This paper presents a development of high accuracy aligner and describes a method to find the orientation of a substantially circular disk shaped wafer with at least one flat region on an edge thereof. In the developed system, the wafer is spun one 360 degree turn on a chuck and the edge position is measured by a linear array to obtain a set of data points at various wafer orientation. The rotation axis may differ from wafer center by an unknown eccentricity. The flat angle is found by fitting a cosine curve to the actual data to obtain a deviation. The maximum deviation is then corrected for errors due to a finite number of data points and wafer eccentricity by calculating an adjustment angle from data points on the wafer fiat. After determining the flat angle the wafer is spun to the desired orientation. The wafer eccentricity can be calculated from four of the data points located away from the flat edge region. and the wafer is then centered.

• 반도체디스플레이기술학회지
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• 제21권1호
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• pp.142-147
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• 2022

After introducing Hybrid Bonding technology into image sensors using stacked sensors and image processors, large quantity production became possible. As a result, it is currently used in most of the CMOS image market in smartphones and other image-based devices worldwide, and almost all stacked CIS manufacturing sites have focused on miniaturization using hybrid bonding. In this study, an upper wafer handling module for Wafer to Wafer Hybrid Bonding developed to increase the alignment and precision between wafers when wafer bonding. The module was divided two parts to reduce error of both the alignment and degree of precision during wafer bonding. Wafer handling module developed both new Tip/Tilt system controlling θx,θy of upper wafer and striker to push upper wafer. Based on this, it was confirmed through the stability evaluation that the upper wafer handling module can be controlled without any problem during W2W hybrid bonding.

• 반도체디스플레이기술학회지
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• 제20권4호
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• pp.119-124
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• 2021

In a situation where Moore's law, which states that the performance of semiconductor integrated circuits doubles every two years, is showing a limit from a certain point, and it is difficult to increase the performance due to the limitations of exposure technology.In this study, a wafer hybrid method that can increase the degree of integration Various research on bonding technology is currently in progress. In this study, in order to achieve rotational precision between wafers in wafer hybrid bonding technology, modeling of θ_z alignment stage and VCM actuator modeling used for rotational alignment, magnetic field analysis and desgin, control, and evaluation are performed. The system of this study was controlled by VCM actuator, capactive sensor, and dspace, and the working range was ±7200 arcsec, and the in-position and resoultion were ±0.01 arcsec. The results of this study confirmed that safety and precise control are possible, and it is expected to be applied to the process to increase the integration.

• 반도체디스플레이기술학회지
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• 제22권4호
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• pp.108-112
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• 2023

Precision manufacturing technology is rapidly developing due to the extreme miniaturization of semiconductor processes to comply with Moore's Law. Accurate and precise alignment, which is one of the key elements of the semiconductor pre-process and post-process, is very important in the semiconductor process. The center detection of wafer align marks plays a key role in improving yield by reducing defects and research on accurate detection methods for this is necessary. Methods for accurate alignment using traditional image sensors can cause problems due to changes in image brightness and noise. To solve this problem, engineers must go directly into the line and perform maintenance work. This paper emphasizes that the development of AI technology can provide innovative solutions in the semiconductor process as high-resolution image and image processing technology also develops. This study proposes a new wafer center detection method through variable thresholding. And this study introduces a method for detecting the center that is less sensitive to the brightness of LEDs by utilizing a high-performance object detection model such as YOLOv8 without relying on existing algorithms. Through this, we aim to enable precise wafer focus detection using artificial intelligence.