• 제어로봇시스템학회:학술대회논문집
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• 2000.10a
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• pp.161-161
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• 2000

The clean mobile robot for wafer transfer is AGV that carry each wafer to each equipment. It has wafer handling technology, wafer ID recognition technology, position calibration technology using vision system, and anti-vibration technology. Wafer loading/unloading working accuracy is within ${\pm}$1mm, ${\pm}$3$^{\circ}$. By application of this AGV, we can reduce the manufacturing tack time and bring cost down of equipment.

• Journal of Korea Multimedia Society
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• v.13 no.3
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• pp.400-409
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• 2010

This paper presents a position error recognition system when the wafer is mounted in cleaning equipment among the wafer manufacturing processes. The proposed system is to enhance the performance in cost and reliability by preventing the wafer cleaning system from damaging by alerting it when it is put in correct position. The key algorithms are the calibration method between image acquired from camera and physical wafer, a infrared lighting and the design of the filter, and the extraction of wafer boundary and the position error recognition resulting from generation of circle based on least square method. The system is to install in-line process using high reliable and high accurate position recognition. The experimental results show that the performance is good in detecting errors within tolerance.

• Journal of KIISE:Software and Applications
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• v.31 no.6
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• pp.792-798
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• 2004

In this paper, we will introduce a new corner detector for the wafer die position recognition. The die position recognition procedure is necessary for WSCSP(Wafer Scale Chip Scale Packaging) technology, decide the accuracy of post-procedure. We present a hierarchical gray level corner detection method for the recognition of the die position from a wafer image. The new corner detector divides the corner region into many homocentric circles, and calculates the comer response and the angle of direction about each circle to get an accurate toner point. The new corner detector has a hierarchical structure so it can detect comer point more quickly than general gray level corner detector.

• Journal of Korea Multimedia Society
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• v.14 no.5
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• pp.632-641
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• 2011

This paper presents a position error recognition system when the wafer is mounted in cleaning equipment among the wafer manufacturing processes. The proposed system is to enhance the performance in cost and reliability by preventing the wafer cleaning system from damaging by alerting it when it is put in correct position. The proposed algorithm is in obtaining a mapping function from camera and physical wafer by designing and manufacturing the radial shape calibrator to reduce the error by using the conventional chess board one. The system is to install in-line process using high reliable and high accurate position recognition. The experimental results show that the performance of the proposed system is better than that of the existing method for detecting errors within tolerance.

• Journal of Korea Multimedia Society
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• v.16 no.6
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• pp.782-794
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• 2013

This paper proposes the wafer position recognition algorithm using camera. First, for eliminating the image distortions caused by the illumination and the irregular camera position, the wafer image is restored as a circle through projective transformation. Next, we use edge detection algorithm to extract the wafer's edge and then apply Generalized Symmetry Transform(GST) to extract a circle. The GST evaluates symmetry between two points by combining a distance weight function, a phase weight function, and a logarithmic mapping of the points' intensities and detecting interest regions. Trough several experiments, we found out the proposed method is able to prevent the cleaning system and the wafer from damaging.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2004.10a
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• pp.549-552
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• 2004

본 논문에서는 반도체의 Wafer ID 문자인식을 위해 기존의 오류 역전파 학습알고리즘을 개선하여 최적의 학습 학습 조건에 관해 연구하였다. 결과, 오류 역전파 학습알고리즘의 학습 최적 조건은 은닉층수는 1층, n값은 0.6 이상, 은닉층 노드수는 10개일 때 99%의 높은 인식률을 보였다 본 논문에서 제안하는 최적조건물 사용함으로써 기존의 오류역전파 학습 알고리즘이 가진 문제점을 해결할 수 있었다.

• Proceedings of the Korean Information Science Society Conference
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• 2004.10a
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• pp.199-201
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• 2004

본 논문에서는 반도체의 Wafer ID 문자인식을 위해 기존의 오류 역전파 학습알고리즘을 개선하여 최적의 학습 조건에 관해 연구하였다. 결과, 오류 역전파 학습알고리즘의 학습 최적 조건은 은닉 층수는 1층, n값은 0.6 이상, 은닉층 노드수는 10개일 때 99%의 높은 인식률을 보였다. 본 논문에서 제안하는 최적조건을 사용함으로써 기존의 오류역전파 학습 알고리즘이 가진 문제점을 해결할 수 있었다.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.55 no.4
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• pp.167-175
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• 2006

This paper presents a method to segment semiconductor wafer ID on poor quality images. The method is based on multiple templates and normalized gray-level correlation (NGC) method. If the lighting condition is not so good and hence, we can not control the image quality, target image to be inspected presents poor quality ID and it is not easy to identify and then recognize the ID characters. Conventional several method to segment the interesting ID regions fails on the bad quality images. In this paper, we propose a multiple template method, which uses combinational relation of multiple templates from model templates to match several characters of the inspection images. To find out the optimal solution of multiple template model in ID regions, we introduce newly-developed snake algorithm. Experimental results using images from real FA environment are presented.

• Journal of the Korean institute of surface engineering
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• v.32 no.3
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• pp.239-243
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• 1999

At Present, 200mm wafer technology is being applied for commercial fabrications of 64, 128, and 256 M DRAM devices, and 300mm technology will be evolved for 1G DRAM devices in the early 21th century, recognizing limitations of several process technologies. In particular recognition has been realized in harmful effects of surface contamination of trace metals introduced during devicing processes. Such a guide line for surface metal contamination has been proposed as 1E9 and 1E10 atoms/$\textrm{cm}^2$ of individual metal contamination for wafering and devicing of 1G DRAM, respectively, and so its measurement limit should be at least 1E8 atoms/$\textrm{cm}^2$. The detection limit of present measurement systems is 2E9 atoms/$\textrm{cm}^2$ obtainable with TRXFA(Total Reflection X-Ray Fluorescence Analysis). TRXFA is nondestructive and the simplest in terms of operation, and it maps the whole wafer surfaces but needs detection improvement. X-Ray intensity produced with synchrotron accelerator is much higher than that of conventional X-ray sources by order of 4-5 magnitudes. Hence theoretically its reactivity with silicon surfaces is expected to be much higher than the conventional one, realizing improvement of detection limit. X-ray produced with synchrotron accelerator is illuminated at a very low angle with silicon wafer surfaces such as 0.1 degree and reflects totally. Hence informations only from surface can be collected and utilized without overlapping with bulk informations. This study shows the total reflection phenomenon and quantitative improvement of detection limit for metallic contamination. It is confirmed that synchrotron X-ray can be a very promising alternative for realizing improvement of detection limit for the next generation devices.

• Proceedings of the Korea Multimedia Society Conference
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• 2012.05a
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• pp.38-39
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• 2012

본 논문에서는 반도체 생산 공정 중 클리닝 공정 과정에서 웨이퍼가 정확한 위치에 장착되었는지를 판단하기 위하여 투영 변환을 이용하여 원형 모양 웨이퍼로 복원하고 에지를 추출한 후 일반화 대칭 변환(Generalized Symmetry Transform, GST) 방법을 적용하여 웨이퍼의 윤곽을 검출하여 위치를 검사하는 방법을 제안한다.