• 반도체디스플레이기술학회지
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• 제7권1호
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• pp.1-5
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• 2008

In this paper, we fabricated pressure difference type gas flow sensor using only dry etching technology by ICP-RIE(inductive coupled plasma reactive ion etching). The sensor's structure consists of a common shear stress type piezoresistive pressure sensor with an orifice fabricated in the middle of the sensor diaphragm. Generally, structure like diaphragm is fabricated by wet etching technology using TMAH, but we fabricated diaphragm by only dry etching using ICP-RIE. To equalize the thickness of diaphragm we applied insulator($SiO_2$) layer of SOI(Si/$SiO_2$/Si-sub) wafer as delay layer of dry etching. Size of fabricated diaphragm is $1000{\times}1000{\times}7\;{\mu}m^3$ and overall chip $3000{\times}3000{\times}7\;{\mu}m^3$. We measured the variation of output voltage toward the change of gas pressure to analyze characteristics of the fabricated sensor. Sensitivity of fabricated sensor was relatively high as about 1.5mV/V kPa at 1kPa full-scale. Nonlinearity was below 0.5%F.S. Over-pressure range of the fabricated sensor is 100kPa or more.

• 전기전자학회논문지
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• 제19권4호
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• pp.535-540
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• 2015

디지털 X-선 촬영 장치에 응용되는 MSGC형 검출기를 설계 및 제작하였다. 기판의 재질은 실리콘기판과 유리기판을 사용하였으며, 기판위에 증착된 전극물질은 포토리소그래피 공정을 이용하였으며, 크롬을 전극의 재료를 이용하였다. 양전극의 폭은 $10{\mu}m$, 음전극의 폭은 $290{\mu}m$로 각각 제작하였다. 양전극과 음전극 사이의 거리는 $100{\mu}m$ 이고, 검출기의 유효영역은 $50{\times}50mm^2$로 설계하였다. 그리고 양전극의 수는 80개로 하였고, 양전극의 전압이 600 Volt 이상 인가한 경우 양전극과 음전극 부분이 방전되어 끊어진 현상을 확인하였다. 결과적으로 검출기체인 Ar(90%) + $CH_4$(10%) 기체 하에서 X-선관의 전압은 42 kV, 최대전류 1 mA까지 인가하여 연구를 수행하였다.

• Journal of Radiation Protection and Research
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• 제28권2호
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• pp.87-95
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• 2003

반도체 검출기의 p+ 층의 도핑 농도, 열처리에 의한 불순물 재분포와 절단면에서의 guard ring 효과를 전산모사하여 최적의 구조와 공전을 설계하고, MCNP코드로 방사선 반응 특성을 분석하였다. 검출기는 반도체 집적회로 공정에서 설계된 공정변수를 적용하여 격자 방향 <100>, $400{\Omega}cm$, n형, Floating-Zone 실리콘 기판에서 제작되었다. 제작된 검출기의 누설전류 밀도는 $0.7nA/cm^2/100{\mu}m$로서 전기적 특성이 우수한 것으로 나타났으며, Cs-137 감마 선원에 의한 $5mR/h{\sim}25R/h$의 조사선량률 범위에서 방사선 반응 특성은 양호한 선형성을 보였다. 본 연구에서 제안된 공정으로 제작된 PIN 반도체 검출기는 개인선량 측정에 사용될 수 있을 것이다.

• 한국재료학회지
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• 제19권4호
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• pp.224-227
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• 2009

Nanofabrication is an essential process throughout industry. Technologies that produce general nanofabrication, such as e-beam lithography, dip-pen lithography, DUV lithography, immersion lithography, and laser interference lithography, have drawbacks including complicated processes, low throughput, and high costs, whereas nano-transfer printing (nTP) is inexpensive, simple, and can produce patterns on non-plane substrates and multilayer structures. In general nTP, the coherency of gold-deposited stamps is strengthened by using SAM treatment on substrates, so the gold patterns are transferred from stamps to substrates. However, it is hard to apply to transfer other metallic materials, and the existing nTP process requires a complicated surface treatment. Therefore, it is necessary to simplify the nTP technology to obtain an easy and simple method for fabricating metal patterns. In this paper, asnTP process with poly vinyl alcohol (PVA) mold was proposed without any chemical treatment. At first, a PVA mold was duplicated from the master mold. Then, a Mo layer, with a thickness of 20 nm, was deposited on the PVA mold. The Mo deposited PVA mold was put on the Si wafer substrate, and nTP process progressed. After the nTP process, the PVA mold was removed using DI water, and transferred Mo nano patterns were characterized by a Scanning electron micrograph (SEM) and Energy Dispersive spectroscopy (EDS).

• E2M - 전기 전자와 첨단 소재
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• 제9권1호
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• pp.30-37
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• 1996

Previously, crystallization of a-Si:H films on glass substrates were limited to anneal temperature below 600.deg. C, over 10 hours to avoid glass shrinkage. Our study indicates that the crystallization is strongly influenced by anneal temperature and weakly affected by anneal duration time. Because of the high temperature process and nonconducting substrate requirements for poly-Si TFTs, the employed substrates were limited to quartz, sapphire, and oxidized Si wafer. We report on poly-Si TFT's using high temperature anneal on a Si:H/Mo structures. The metal Mo substrate was stable enough to allow 1000.deg. C anneal. A novel TFT fabrication was achieved by using part of the Mo substrate as drain and source ohmic contact electrode. The as-grown a-Si:H TFT was compared to anneal treated poly-Si TFT'S. Defect induced trap states of TFT's were examined using the thermally stimulated current (TSC) method. In some case, the poly-Si grain boundaries were passivated by hydrogen. A-SI:H and poly-Si TFT characteristics were investigated using an inverted staggered type TFT. The poly -Si films were achieved by various anneal techniques; isothermal, RTA, and excimer laser anneal. The TFT on as grown a-Si:H exhibited a low field effect mobility, transconductance, and high gate threshold voltage. Some films were annealed at temperatures from 200 to >$1000^{\circ}C$ The TFT on poly-Si showed an improved $I_on$$I_off$ ratio of $10_6$, reduced gate threshold voltage, and increased field effect mobility by three orders. Inverter operation was examined to verify logic circuit application using the poly Si TFTs.

• E2M - 전기 전자와 첨단 소재
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• 제7권3호
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• pp.243-251
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• 1994

ITO(Indium Tin Oxide) film with thickness of 1500.angs. was prepared by an e-beam evaporator onto a glass and a p-type InP wafer (100) LEC grown Zn-doped p=2.3*10$\^$16/cm$\^$-3/), in which the components of ITO used for evaporation source were hot pressed pellets 1 mole% ln$\_$2/O$\_$3/+9 mole% SnO$\_$2/, and evaporated in O$\_$2/ ambient. The optimum conditions to preparation of ITO thin film were the substrate temperature of 350.deg. C, the injected oxygen pressure of 2*10$\^$-4/ torr, and the evaporation speed of 0.2-0.3.angs./sec, respectively. In these optimum conditions, the resistivity and the carrier concentration were 5.3*10$\^$-3/ .ohm.-cm, 6.5*10$\^$20/cm$\^$-3/, and the transmittance was over 80%. From the results of J-V measurements in ITO/p-InP structure solar cells, the higher pressure of injected oxygen, the more open circuit voltage. The efficiency of ITO/p-InP solar cell without the grid line contact, prepared by the optimum evaporation conditions, was 7.19%. By using the grid line contact, the efficiency, the open circuit voltage, the short circuit current density, the fill factor, the series resistance, and the shunt resistance were 8.5%, 0.47V, 29.48 mAcm$\^$-2/ , 61.35%, 3.ohm., and 26.6k.ohm., respectively.

• 한국전기전자재료학회논문지
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• 제24권9호
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• pp.701-709
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• 2011

In semiconductor wafer fabrication, etching is one of the most critical processes, by which a material layer is selectively removed. Because of difficulty to correct a mistake caused by over etching, it is critical that etch should be performed correctly. This paper proposes a new approach for etch endpoint detection of small open area wafers. The traditional endpoint detection technique uses a few manually selected wavelengths, which are adequate for large open areas. As the integrated circuit devices continue to shrink in geometry and increase in device density, detecting the endpoint for small open areas presents a serious challenge to process engineers. In this work, a high-resolution optical emission spectroscopy (OES) sensor is used to provide the necessary sensitivity for detecting subtle endpoint signal. Partial Least Squares (PLS) method is used to analyze the OES data which reduces dimension of the data and increases gap between classes. Support Vector Machine (SVM) is employed to detect endpoint using the data after PLS. SVM classifies normal etching state and after endpoint state. Two data sets from OES are used in training PLS and SVM. The other data sets are used to test the performance of the model. The results show that the trained PLS and SVM hybrid algorithm model detects endpoint accurately.

• 한국전기전자재료학회논문지
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• 제30권8호
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• pp.525-529
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• 2017

Molybdenum oxide ($MoO_3$) offers pivotal advantages for high optical transparency and low light reflection. Considering device fabrication, n-type $MoO_3$ semiconductor can spontaneously establish a junction with p-type Si. Since the energy bandgap of Si is 1.12 eV, a maximum photon wavelength of around 1,100 nm is required to initiate effective photoelectric reaction. However, the utilization of infrared photons is very limited for Si photonics. Hence, to enhance the Si photoelectric devices, we applied the wide energy bandgap $MoO_3$ (3.7 eV) top-layer onto Si. Using a large-scale production method, a wafer-scale $MoO_3$ device was fabricated with a highly crystalline structure. The $MoO_3/p-Si$ heterojunction device provides distinct photoresponses for long wavelength photons at 900 nm and 1,100 nm with extremely fast response times: rise time of 65.69 ms and fall time of 71.82 ms. We demonstrate the high-performing $MoO_3/p-Si$ infrared photodetector and provide a design scheme for the extension of Si for the utilization of long-wavelength light.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1992년도 춘계학술대회 논문집
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• pp.110-113
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• 1992

$n^{+}$-p homojunction InP diodes were fabricated using thermal diffusion of Sulfur into p-type InP substrates(Zn doped, LEC grown, p=2.3${\times}$10$^{16}$c $m^{-3}$). The Sulfur diffusion was carried out at 550$^{\circ}C$, 600$^{\circ}C$, 700$^{\circ}C$ for 4 hours in a sealed quartz ampule(～2ml in volume) containing 5mg I $n_2$ $S_3$ and Img of red phosphorus. The formed junction depth was below 0.5$\mu\textrm{m}$. After the removal of diffused layer on the rear surface of the wafer, the beak ohmic contacts to the p-side were made with a vacuum evaporation of An-Zn(2%) followed by an annealing at 450$^{\circ}C$ for 5 minutes in flowing Ar gas. The front contacts were made with a vacuum evaporation of Au-Ge(12%) followed by an annealing at 500$^{\circ}C$ for 3 minutes in flowing Ar gas. The remarkable sprctral response of the cells obtained at the region of 6000-8000${\AA}$ region. The open circuit voltage $V_{oc}$ , short circuit current density $J_{sc}$ , fill factor and conversion efficiency η of the fabricated pattern solar cells(diffusion condition : at 700$^{\circ}C$ for 4 hours) were 0.660V, 14.04㎃/$\textrm{cm}^2$, 0.6536 and 10.09%, respectively.y.

• 센서학회지
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• 제8권5호
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• pp.400-406
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• 1999

(100), n/$n^+$/n 3층 실리콘 웨이퍼를 이용하여 4가지 형태의 미소 빔 구조를 가지는 압저항형 유체센서를 제작하고, 그 특성을 조사하였다. Boron 확산을 통하여 압저항을 형성하였으며 형성된 압저항의 저항 값은 $1\;k{\Omega}$ 정도였다. 다공질 실리콘 마이크로머시닝을 이용하여 3차원의 실리콘 미소 빔 구조체를 제작하였으며, 실리콘과 금속의 열팽창계수 차이를 이용하여 빔을 위로 휘게 하여 원하는 형상으로 제조하였다. 제조된 센서의 출력 특성은 half-bridge를 구성하여 조사하였다. 같은 유속에서는 빔의 길이에 비례하여 출력 전압이 증가함을 보였고, 반면에 빔의 길이가 짧을수록 측정 가능 구간이 넓게 나타났다. 제조된 센서의 출력전압은 유량의 3.2승에 비례하여 증가하였으며, 이는 유속에 따른 빔이 받는 응력이 비 선형 특성을 나타내기 때문이다.