• Title/Summary/Keyword: WLP

Search Result 40, Processing Time 0.028 seconds

Evaluation of light-emitting diode colors and intensities on slaughter performance, meat quality and serum antioxidant capacity in caged broilers

  • Zichao Tan;Chuanfeng Zhou;Xueping Shi;Lihua Wang;Shubai Wang
    • Animal Bioscience
    • /
    • v.36 no.5
    • /
    • pp.731-739
    • /
    • 2023
  • Objective: This study was to evaluate the interaction of three different light-emitting diode (LED) light colors (white, green, and blue) and three intensities (5, 10, and 15 lx) on slaughter performance, meat quality and serum antioxidant capacity of broilers raised in three-layer cages. Methods: A total of 648 (8-days-old) male broiler chicks (Cobb-500) were randomly assigned in 3×3 factorially arranged treatments: three light colors (specifically, white, blue, and green) and three light intensities (namely, 5, 10, and 15 lx) for 35 days. Each treatment consisted of 6 replicates of 12 chicks. The test lasted for 35 days. Results: The semi-eviscerated weight percentage (SEWP) in 5 lx white was higher than that in 15 lx (p<0.01). The eviscerated weight percentage (EWP) (p<0.05) and water-loss percentage (WLP) (p<0.01) decreased in 10 lx white light than those in green light. Under blue light, the content of hypoxanthine (Hx) in muscle was lower than that under white and green light (p<0.01). The content of malondialdehyde (MDA) in 15 lx blue light was higher than that in 10 lx green light (p<0.05). Light color had an extremely significant effect on thigh muscle percentage, WLP, Hx, and crude protein content (p<0.01). Light intensity had a significant effect on SEWP (p<0.05), EWP (p<0.05), lightness (L*) value (p<0.05), WLP (p<0.01), and the contents of superoxide dismutase (p<0.05), MDA (p<0.01), glutathione peroxidase (p<0.01). Conclusion: Using white LED light with 10 lx light intensity can significantly improve the chicken quality of caged Cobb broilers, improve the content of inosine acid in chicken breast and enhance the antioxidant capacity of the body. We suggest that the broiler farm can use 10 lx white LED light source for lighting in 8 to 42 days.

Numerical Analysis of Warpage and Reliability of Fan-out Wafer Level Package (수치해석을 이용한 팬 아웃 웨이퍼 레벨 패키지의 휨 경향 및 신뢰성 연구)

  • Lee, Mi Kyoung;Jeoung, Jin Wook;Ock, Jin Young;Choa, Sung-Hoon
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.21 no.1
    • /
    • pp.31-39
    • /
    • 2014
  • For mobile application, semiconductor packages are increasingly moving toward high density, miniaturization, lighter and multi-functions. Typical wafer level packages (WLP) is fan-in design, it can not meet high I/O requirement. The fan-out wafer level packages (FOWLPs) with reconfiguration technology have recently emerged as a new WLP technology. In FOWLP, warpage is one of the most critical issues since the thickness of FOWLP is thinner than traditional IC package and warpage of WLP is much larger than the die level package. Warpage affects the throughput and yield of the next manufacturing process as well as wafer handling and fabrication processability. In this study, we investigated the characteristics of warpage and main parameters which affect the warpage deformation of FOWLP using the finite element numerical simulation. In order to minimize the warpage, the characteristics of warpage for various epoxy mold compounds (EMCs) and carrier materials are investigated, and DOE optimization is also performed. In particular, warpage after EMC molding and after carrier detachment process were analyzed respectively. The simulation results indicate that the most influential factor on warpage is CTE of EMC after molding process. EMC material of low CTE and high Tg (glass transition temperature) will reduce the warpage. For carrier material, Alloy42 shows the lowest warpage. Therefore, considering the cost, oxidation and thermal conductivity, Alloy42 or SUS304 is recommend for a carrier material.

Comparative Analysis of Coding Performance of Several ECG Compression Methods (ECG 압축 방법들의 코딩 성능 비교 분석)

  • Jang, Seung-Jin;Song, Sang-Ha;Yun, Yeong-Ro
    • Proceedings of the KIEE Conference
    • /
    • 2008.04a
    • /
    • pp.137-138
    • /
    • 2008
  • 수많은 방식의 ECG 압축 코딩 알고리즘이 개발되어왔고 현재도 개발 중이지만 각자의 알고리즘의 성능에 유리한 특정 데이터만을 분석하고 압축율이 다름으로 인해 다른 알고리즘과의 성능 비교를 객관화하고 있지 못하였다. 본 연구에서는 기존의 MIT-BIH에서 제공하는 ECG 신호와 달리 시뮬레이션된 ECG 신호를 기반으로 각각의 알고리즘에 대한 성능비교를 하여 ECG신호의 특성에 따른 코딩 알고리즘의 압축율 및 평균 오차 에러의 정도를 분석비교하였다. 비교 대상 알고리즘으로는 상용화되어 널리 사용되는 Delta 코팅 방식의 문턱치를 갖는 Discrete Pulse Code Modulation과 Discrete Cosine Transform, Lifting Wavelet Transform과 Wavelet 기반 Linear Prediction 4가지 알고리즘을 대상으로 분석하였다. Compression Ratio (CR)을 2,4로 고정하고 Percentage of Root-mean-square difference (PDR)를 분석 한 결과, EMG 잡음의 진폭변 화에는 0.1mV이하의 경우 OCT, Wavelet Lifiting Transform이 낮은 PDR을 보였고, 01.mV이상의 경우 Wavelet based Linear Prediction (WLP)이 낮은 PDR을 보였다. Heart Rate의 간격에 변화를 주어 불규칙성이 있는 경우 WLP가 가장 안좋은 PDR 결과를 보였으며, DCT가 가장 낮고 안정된 PDR 결과를 보였다. DPCM은 노이즈와 진폭간격의 변화에 상관없이 압축율에 의해 크게 PDR 성능 결과가 변화함을 나타내었다.

  • PDF

Wafer Level Package Using Glass Cap and Wafer with Groove-Shaped Via (유리 기판과 패인 홈 모양의 홀을 갖는 웨이퍼를 이용한 웨이퍼 레벨 패키지)

  • Lee, Joo-Ho;Park, Hae-Seok;Shin, Jea-Sik;Kwon, Jong-Oh;Shin, Kwang-Jae;Song, In-Sang;Lee, Sang-Hun
    • The Transactions of The Korean Institute of Electrical Engineers
    • /
    • v.56 no.12
    • /
    • pp.2217-2220
    • /
    • 2007
  • In this paper, we propose a new wafer level package (WLP) for the RF MEMS applications. The Film Bulk Acoustic Resonator (FBAR) are fabricated and hermetically packaged in a new wafer level packaging process. With the use of Au-Sn eutectic bonding method, we bonded glass cap and FBAR device wafer which has groove-shaped via formed in the backside. The device wafer includes a electrical bonding pad and groove-shaped via for connecting to the external bonding pad on the device wafer backside and a peripheral pad placed around the perimeter of the device for bonding the glass wafer and device wafer. The glass cap prevents the device from being exposed and ensures excellent mechanical and environmental protection. The frequency characteristics show that the change of bandwidth and frequency shift before and after bonding is less than 0.5 MHz. Two packaged devices, Tx and Rx filters, are attached to a printed circuit board, wire bonded, and encapsulated in plastic to form the duplexer. We have designed and built a low-cost, high performance, duplexer based on the FBARs and presented the results of performance and reliability test.

Effect on Co-Situs Application of Coated Urea Complex Fertilizer in Dry Seeded Rice (벼 건답직파재배시 완효성 복합비료의 접촉시비효과)

  • Park, Ki-Do;Kwen, Hye-Young;Park, Chang-Young;Jeon, Weon-Tae;Kim, Choon-Sik
    • Korean Journal of Soil Science and Fertilizer
    • /
    • v.35 no.2
    • /
    • pp.112-117
    • /
    • 2002
  • This study was conducted to investigate effects on the co-situs application of coated urea complex fertilizer in dry seeded rice in Dukpyong series soil. Number of spikelet established in 15 days after seeding, conventional plot was $120ea\;per\;m^2$. and whole layer placement(WLP), co-situs application 70%(CSA70%) plot and co-situs application 50%(CSA50%) plot were 146, 126 and $120ea\;per\;m^2$, respectively. There was not concentration obstacle in co-situs application plot in spite of closing application between seed and coated urea complex fertilizer. The amount of $NH_4-N$ into soil solution in different growth stage was highest in WLP 70% plot compare to other treatment. N uptaken amount was highest in CSA 70% plot as $94kg\;ha^{-1}$ compare to $90kg\;ha^{-1}$ of WLP 79% plot and $82kg\;ha^{-1}$ of CSA 50% plot. However, N use efficiency of CSA 50% plot was highest among treatments as 48%. Rice yield was highest in CSA 70% plot as 102% compared to conventional plot.

A Novel Chip Scale Package Structure for High-Speed systems (고속시스템을 위한 새로운 단일칩 패키지 구조)

  • 권기영;김진호;김성중;권오경
    • Proceedings of the International Microelectronics And Packaging Society Conference
    • /
    • 2001.11a
    • /
    • pp.119-123
    • /
    • 2001
  • In this paper, a new structure and fabrication method for the wafer level package(WLP) is presented. A packaged VLSI chip is encapsulated by a parylene(which is a low k material) layer as a dielectric layer and is molded by SUB photo-epoxy with dielectric constant of 3.0 at 100 MHz. The electrical parameters (R, L, C) of package traces are extracted by using the Maxwell 3-D simulator. Based on HSPICE simulation results, the proposed wafer level package can operate for frequencies up to 20GHz.

  • PDF

Die Shift Measurement of 300mm Large Diameter Wafer (300mm 대구경 웨이퍼의 다이 시프트 측정)

  • Lee, Jae-Hyang;Lee, Hye-Jin;Park, Sung-Jun
    • Journal of the Korea Academia-Industrial cooperation Society
    • /
    • v.17 no.6
    • /
    • pp.708-714
    • /
    • 2016
  • In today's semiconductor industry, manufacturing technology is being developed for the purpose of processing large amounts of data and improving the speed of data processing. The packaging process in semiconductor manufacturing is utilized for the purpose of protecting the chips from the external environment and supplying electric power between the terminals. Nowadays, the WLP (Wafer-Level Packaging) process is mainly used in semiconductor manufacturing because of its high productivity. All of the silicon dies on the wafer are subjected to a high pressure and temperature during the molding process, so that die shift and warpage inevitably occur. This phenomenon deteriorates the positioning accuracy in the subsequent re-distribution layer (RDL) process. In this study, in order to minimize the die shift, a vision inspection system is developed to collect the die shift measurement data.

A Study on a Laser Dicing and Drilling Machine for Si Thin-Wafer (UV 레이저를 이용한 Si Thin 웨이퍼 다이싱 및 드릴링 머신)

  • Lee, Young-Hyun;Choi, Kyung-Jin
    • Proceedings of the KIEE Conference
    • /
    • 2004.11c
    • /
    • pp.478-480
    • /
    • 2004
  • 다이아몬드 톱날을 이용한 얇은 Si 웨이퍼의 기계적인 다이싱은 chipping, crack 등의 문제점을 발생시킨다. 또한 stacked die 나 multi-chip등과 같은 3D-WLP(wafer level package)에서 via를 생성하기 위해 현재 사용되는 화학적 etching은 공정속도가 느리고 제어가 힘들며, 공정이 복잡하다는 문제점을 가지고 있다. 이러한 문제점을 해결하기 위해 현재 연구되고 있는 분야가 레이저를 이용한 웨이퍼 다이싱 및 드릴링이다. 본 논문에서는 UV 레이저를 이용한 얇은 Si 웨이퍼 다이싱 및 드릴링 시스템에 대해 소개하고, 웨이퍼 다이싱 및 드릴링 실험결과를 바탕으로 적절한 레이저 및 공정 매개변수에 대해 설명한다.

  • PDF