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Programming Model for Web-based Mobile Agent (웹을 기반으로 한 자바 이동에이전트 프로그래밍 모델)

  • Song, Sung-Hoon;Won, Yoo-Hun
    • Journal of KIISE:Software and Applications
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    • v.29 no.4
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    • pp.225-234
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    • 2002
  • The developers of mobile agent systems are considering integrating the system into the web and the developers of web servers are also considering supporting mobile agents in the future. But they are not clearly suggesting the relationship between web programming which has basically client/server architecture and mobile agent programming which is based on autonomous code mobility. In this paper, firstly, we clarify the method for integrating mobile agent programming into web programming by suggesting the model for mobile agent programming on the web. Secondly, by developing APIs for Java which is widely used for both web programming and mobile agent programming, we made it possible for programmers to use them for programming mobile agent on the web. Thirdly, we show the usefulness of the proposed model by adding and testing modules for execution environment of mobile agents on W3C's Java based web server, Jigsaw.

A Design an Implementation of a Base Station Transceiver for WLL System (무선 가입자 접속망 기지국용 송수신기 설계 및 구현)

  • 정영준;강상기;이일규;김봉겸;홍헌진
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.8 no.6
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    • pp.600-613
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    • 1997
  • The implementation of a BTS(Base station Transceiver) for WLL system using W-CDMA(Wideband-Code Division Multiple Access) method is presented in this paper. It consists of three boards; receiver, transmitter and RF controller. Some RF parameters are considered and simulated by the RF simulation S/W using commercial and customized components specifications. The implemented transceiver of 5 MHz RF channel bandwidth satisfies the system requirements of a transceiver such as dynamic range, sensitivity in the receiver and spurious emission suppression in the transmitter. At the receiver, the experimental measurement showed 2.86 dB of NF and 60 dB above of dynamic range in AGC(Automatic Gain Control) locking. At the transmitter, the -49.46 dBc of spurious emission suppression is attained when the output power of the transmitter is 34.3 dBm. These results are good enough to meet to standard performance specifications.

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Estimation of Pile Shaft Resistances with Elastic Modulus Depending on Strain (변형률에 따른 탄성계수 변화를 고려한 말뚝의 주면지지력 산정)

  • Kim, Seok-Jung;Kim, Sung-Heon;Jung, Sung-Jun;Kwon, Oh-Sung;Kim, Myoung-Mo
    • Proceedings of the Korean Geotechical Society Conference
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    • 2009.09a
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    • pp.933-943
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    • 2009
  • Axial loads and shaft resistances can be calculated by load transfer analysis using strain data with load level. In load transfer analysis, the elastic modulus of concrete is a one of the most important parameters to consider. The elastic modulus, $E_{50}$, suggested by ACI (American Concrete Institute), has been commonly used. However, elastic modulus of concrete shows nonlinear stress-strain characteristic, so nonlinearity should be considered in load transfer analysis. In this paper, a load transfer analysis was performed by using data obtained from bi-directional pile load tests for four cases of drilled shafts. For consideration of nonlinearity, elastic modulus was calculated by both the Fellenius method and the nonlinear method, assuming the stress-strain relation of concrete to be a quadratic function, and then, the calculated elastic modulus was applied to the estimation of shaft resistance. The calculated shaft resistances were compared with the result obtained using the constant elastic modulus of ACI code. It was found that the f-w curves are similar to each method, and elastic modulus and shaft resistances decreased as strain increased. Moreover, shaft resistances estimated from elastic modulus considering nonlinearity were 5~15% different than those obtained using the constant elastic modulus.

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Assessment of performance for Output Power Control of Wind Turbine using Energy Storage System (에너지저장장치를 이용한 풍력발전 출력 제어 성능 평가)

  • Hong, Jong-Seok;Choi, Chang-Ho;Lee, Joo-Yeon;Kim, Jae-Chul
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.63 no.4
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    • pp.254-259
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    • 2014
  • In this paper, we describe construction of a wind stabilization demo-site and effects of output power control of wind turbines for suppression of ramp rate using ESS (Energy Storage System). It is difficult to control the output power of distributed generator such as wind turbine which of variation is very large. If the large capacity wind farm be interconnected into power system may cause blackout due to Power Quality. For these reasons, the international standards such as Grid-Code is limited to less than 10 [%/min] of renewable energy ramp rate. The case of Korea, government actively conducts propagating large-scale renewable energy for green growth policy, to interconnecting more renewable energy into power system is necessary for stabilization technology. For these reasons, the POSCO consortium has constructed a wind stabilization demo-site that is configured as 500 [kWh] battery energy storage systems can output up to 3 [C-Rate] and two wind turbines rated 750 [kW]. In POSCO consortium, which implements various methods stabilizing output power of wind turbine such as smoothing, section firming and ramp control, we derive the results of long-term demonstration that can be controlled to satisfy to the international standard about ramp rate [%/kW] of wind turbine output power.

A Numerical Study on the Internal Flow and Combustion Characteristics of the Catalytic Combustor for the 5kW MCFC Power system (5kW 급 MCFC 발전시스템 촉매연소기의 유동 및 연소 특성에 대한 수치적 연구)

  • Kim, Chong-Min;Lee, Youn-Wha;Kim, Man-Young;Kim, Hyung-Gon;Hong, Dong-Jin;Cho, Ju-Hyeong;Kim, Han-Seok;Ahn, Kook-Young
    • Proceedings of the KSME Conference
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    • 2008.11b
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    • pp.3049-3052
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    • 2008
  • MCFC(molten carbonate fuel cell) power generation system is prime candidate for the utilization of fossil based fuels to generate ultra clean power with a high efficiency. In the MCFC power plant system, a combustor performs a role to supply high temperature mixture gases for cathode and heat for reformer by using the stack off-gas of the anode which includes a high concentration of $H_2O$ and $CO_2$. Since a combustor needs to be operated in a very lean condition and to avoid excessive local heating, catalytic combustor is usually used. The catalytic combustion is accomplished by the catalytic chemical reaction between fuel and oxidizer at catalyst surface, different from conventional combustion. In this study, a mathematical model for the prediction of internal flow and catalytic combustion characteristics in the catalytic combustor adopted in the MCFC power plant system is suggested by using the numerical methods. The numerical simulation models are then implemented into the commercial CFD code. After verifying result by comparing with the experimental data and calibrated kinetic parameters of catalytic combustion reaction, a numerical simulation is performed to investigate the variation of flow and combustion characteristics by changing such various parameters as inlet configuration and inlet temperature. The result show that the catalytic combustion can be effectively improved for most of the case by using the perforated plate and subsequent stable catalytic combustion is expected.

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Design of Transformation Engine for Mobile 3D Graphics (모바일 3차원 그래픽을 위한 기하변환 엔진 설계)

  • Kim, Dae-Kyoung;Lee, Jee-Myong;Lee, Chan-Ho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.10
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    • pp.49-54
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    • 2007
  • As digital contents based on 3D graphics are increased, the requirement for low power 3D graphic hardware for mobile devices is increased. We design a transformation engine for mobile 3D graphic processor. We propose a simplified transformation engine for mobile 3D graphic processor. The area of the transformation engine is reduced by merging a mapping transformation unit into a projective transformation unit and by replacing a clipping unit with a selection unit. It consists of a viewing transformation unit a projective transformation unit a divide by w nit, and a selection unit. It can process 32 bit floating point format of the IEEE-754 standard or a reduced 24 bit floating point format. It has a pipelined architecture so that a vertex is processed every 4 cycles except for the initial latency. The RTL code is verified using an FPGA.

Design of Digital PLL using Binary Phase-Frequency Detector and Counter for Digital Phase Detection (이진 위상-주파수 검출기와 카운터를 이용한 디지털 위상 고정 루프 회로 설계)

  • Han, Jong-Seok;Yoon, Kwan;Kang, Jin-Ku
    • Journal of IKEEE
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    • v.16 no.4
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    • pp.322-327
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    • 2012
  • In this paper, a digital phase-locked loop(Digital-PLL) circuit with a new phase-to-digital converter(P2D) is described. The proposed digital PLL is composed a P2D, a digital loop filter(DLF), and a digitally controlled oscillator(DCO). The P2D generates a digital code for a phase error. The proposed P2D used a binary phase frequency detector(BPFD) and a counter in place of a time-to-digital converter(TDC) for simple structure, compact area and low power consumption. The proposed circuit was designed with CMOS 0.18um process. The simulation shows the circuit operates with the 1.0 to 2.2GHz with the power consumption of 16.2mW at 1.65GHz and the circuit occupies the chip area of $0.096mm^2$.

A 6-bit, 70MHz Modified Interpolation-2 Flash ADC with an Error Correction Circuit (오류 정정기능이 내장된 6-비트 70MHz 새로운 Interpolation-2 Flash ADC 설계)

  • 박정주;조경록
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.3
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    • pp.83-92
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    • 2004
  • In this thesis, a modified interpolation-2 6-bit 70MHz ADC is proposed minimizing chip area and power consumption, which includes an error correction circuit. The conventional flash ADC without interpolation comparators suffers from large chip area and more power consumption due to 2n resistors and 2n-1 comparators. Although the flash ADC with interpolation-4 comparators has small area, SNR, INL and DNL are degraded by comparison with the interpolation -2 comparator. We fabricated the proposed 6-bit ADC with interpolation-2 comparators using 0.18${\mu}{\textrm}{m}$ CMOS process. The ADC is composed of 32-resistors, 31 comparators, amplifiers, latches, error correction circuit, thermometer code detector and encoder As the results, power consumption is reduced to 40mW at 3.3V which is saving about 50% than a flash ADC without interpolation comparators, and area is reduced by 20%. SNR is increased by 75% in comparison with that of a flash ADC with interpolation-4 comparators.

An Analysis on the Design and Speed Performance of a One-man Boat (1인승 소형 보트 설계 및 속도성능 분석)

  • Park, Dong-Woo;Park, Gyeong-Min
    • Journal of the Korean Society of Marine Environment & Safety
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    • v.20 no.5
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    • pp.552-557
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    • 2014
  • The objective of the This study is to access the speed performance employing the sea trial test and CFD with the our own designed and manufactured one-man boat. The overall design process including hull form design was explained. The sea trial was carried out with a manufactured boat in the clam sea. Brake power at the design speed of a boat through the sea trial was measured as 1680 W. The flow computation was conducted considering free surface and dynamic trim using a commercial CFD code(STAR-CCM+). The result of computation provided the information that residual resistance is bigger than fraction's at design speed. The total efficiency were predicted based on the sea trial and CFD. The Total efficiency was divided into shaft efficiency and quasi-propulsive efficiency. By using quasi-propulsive efficiency, it becomes possible to predict speed performance of boat in future. The results can provide information regarding hull form design, performance analysis and development of a boat in future.

Necessary Conditions for Optimal Ventilation of Small Negative Pressure Ventilating Piglet House with Corridor and Attic for Preheating (소규모 복도-더그매 예열 음압환기방식 무창자돈사의 최적 환기 요건에 관한 연구)

  • Lee, Seung-Joo;Chang, Dong-Il;Hwang, Seon-Ho;Gutierrez, Winson M.;Chang, Hong-Hee
    • Journal of Biosystems Engineering
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    • v.35 no.6
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    • pp.434-442
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    • 2010
  • This study was carried out to determine necessary conditions for optimal ventilation of small windowless piglet house (4.0 (W) $\times$ 11.0 (L) $\times$ 2.6(H) m) with corridor and attic for preheating using CFD (Computational Fluid Dynamics) simulation. The experimental weaning piglet house was consisted of a corridor, an attic, 4 rooms (3.0 (W) $\times$ 2.75(L) m), 3 fences (0.7(H) m), 5 air inlets and 2 exhaust fans (0.4 (D) m) and simulated using CFD code, FLUENT. The simulation results for the experimental weaning piglet house showed that each room was uniformly ventilated under all the experimental conditions and air velocities at 0.1 m above floor are less than 0.15 m/s for 0.75 m/s and 1.0 m/s of air inlet velocity but 0.61 m/s for 1.25 m/s. The simulation results are similar to the measured results. Considering the air flow pattern, ventilating efficiency, air velocity at 0.1 m above floor and cold stress of weaning piglets and so on, the optimum velocity of air inlet might be 1.0 m/s.