• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.417-418
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• 2008

A quadrature voltage controlled oscillator(QVCO) with MOS-varactors has been fabricated for X-band applications. The QVCO consists of two cross -coupled differential cores and buffer amplifiers, which has fabricated in TSMC $0.18{\mu}m$ CMOS process. The QVCO exhibits a frequency tuning range from 8.38 GHz to 10.62 GHz. The phase noise is -88 dBc/Hz at 1 MHz-offset frequency. The total bias current is 25 mA including four buffer amplifiers.

• Proceedings of the KIEE Conference
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• 1993.07b
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• pp.701-703
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• 1993

This paper describes characteristic analysis of high frequency inverter using zero voltage switching(ZVS) which is one of the methods to reduce switching loss. This study is generally described by introducing normalized control variables. Moreover, many characteristics of analysis results offer importanat data for circuit design. In addition, the result of its characteristic analysis is compared with that from PSpice's simulation.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.47 no.1
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• pp.84-90
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• 2010

In this paper, a novel voltage-controlled oscillator (VCO) using the harmonic control circuit based on the composite right/left-handed (CRLH) transmission lines (TLs) is presented to reduce the phase noise without the reduction of the frequency tuning range and miniaturize the circuit size. The phase noise is reduced by the novel harmonic control circuit having the short impedances for the second- and third-harmonic components. The proposed harmonic control circuit is designed by using the CRLH TLs with the dual-band characteristic by the frequency offset and phase slope of the CRLH TLs. The high-Q resonator has been used to reduce the phase noise, but has the problem of the frequency tuning range reduction. However, the frequency tuning range of the proposed VCO has not been reduced because the phase noise has been reduced without the high-Q resonator. The miniaturization of the circuit size is achieved by using the CRLH TLs instead of the conventional right-handed (RH) TLs. The phase noise of VCO is -119.17 ~ -117.50 dBc/Hz at 100 kHz in the tuning range of 5.731 ~ 5.938 GHz.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.6
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• pp.30-38
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• 1998

In this paper, a new CMOS current-mode integrator is proposed that can apply the basic building block of the low-voltage high frequency current-mode active filter. And tuning circuits that control the gain and unity gain frequency of them is designed. The proposed integrator is composed of the CMOS complementary circuit which can extend transconductance of an integrator. Therefore, the unity gain frequency which is determined transconductance and MOSFET gate capacitance can be expanded by the proposed integrator. The unity gain frequency of the proposed integrator is increased about two times larger than that of the conventional continuous-time integrator with NMOS-gm. And also, cut-off frequency and gain of the active filter can be controlled with the designed tuning circuit. From the result, we can reduce errors on fabrication. And then, 3rd-order low-pass active filter is designed as an application circuits. These results are verified by the small signal analysis and the 0.8$\mu\textrm{m}$ parameter HSPICE simulation.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.5 s.120
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• pp.511-521
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• 2007

In this paper, we designed and fabricated a Ka-band synthesizer module. In addition, the systematic layout procedure and the test procedure were presented for the construction of compact synthesizer. To implement the Ka-band synthesizer, X-band VCO is employed as VCO and its frequency was multiplied by 3 with frequency tripler. The fabricated frequency synthesizer shows a frequency tuning range of 500 MHz, output power of about 14 dBm, and a phase noise of -96.17 dBc/Hz at the 100 kHz offset frequency.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.6
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• pp.627-634
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• 2010

In this paper, a novel voltage-controlled oscillator(VCO) using the complimentary bifilar archimedean spiral resonator(CBASR) is presented for reducing the phase noise characteristic. A CBASR has compact dimension, a sharp skirt characteristic in stopband, a low insertion loss in passband, and a large coupling coefficient value, which makes a high Q value and improve the phase noise of VCO. The proposed VCO has the oscillation frequency of 2.396~2.502 GHz in the tuning voltage of 0~5 V, the output power of 7.5 dBm and phase noise of -119.16~-120.2 dBc/㎐ at the offset frequency of 100 kHz in tuning range.

• JSTS:Journal of Semiconductor Technology and Science
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• v.7 no.4
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• pp.281-286
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• 2007

In this paper, sub-circuits for 24 GHz phase locked 100ps(PLLs) using $0.5{\mu}m$ SiGe HBT are presented. They are 24 Ghz voltage controlled oscillator(VCO), 24 GHz to 12 GHz regenerative frequency divider(RFD) and 12 GHz to 1.5 GHz static frequency divider. $0.5{\mu}m$ SiGe HBT technology, which offers transistors with 90 GHz fMAX and 3 aluminum metal layers, is employed. The 24 GHz VCO employed series feedback topology for high frequency operation and showed -1.8 to -3.8 dBm output power within tuning range from 23.2 GHz to 26 GHz. The 24 GHz to 12 GHz RFD, based on Gilbert cell mixer, showed 1.2 GHz bandwidth around 24 GHz under 2 dBm input and consumes 44 mA from 3 V power supply including I/O buffers for measurement. ECL based static divider operated up to 12.5 GHz while generating divide by 8 output frequency. The static divider drains 22 mA from 3 V power supply.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.5C
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• pp.500-505
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• 2002

In this paper, a novel architecture of programmable divider with fifty percent duty cycle output and programmable dividing number has been proposed. Through HSPICE simulation, a 900MHz frequency synthesizer with proposed frequency divider has designed in a standard 0.25$\mu\textrm{m}$ CMOS technology. To verify the operation of proposed frequency divider, a chip had been fabricated using 0.65$\mu\textrm{m}$ 2-poly, 3-metal standard CMOS processing and experimental result shows that the proposed frequency divider works well. The designed voltage controlled oscillator(VCO) has a center frequency of 900MHz, a tuning range of ${\pm}$10%, and a gain of 154MHz/V. The simulated frequency synthesizer performance has a settling time of 1.5${\mu}\textrm{s}$, a frequency range from 820MHz to 1GHz and power consumption of 70mW at 2.5V power supply voltage.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.05c
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• pp.55-58
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• 2001

In this paper, we present the results of the design and fabrication of the VCO(Voltage controlled Oscillator) using RF circuit simulator GENESYS and electromagnetic field simulator EMpower Frequency range is fabricated VCO is 850 MHz ~ 950 MHz, which is used Colpitts Circuit. the fabricated VCO is consisted of resonator, oscillator and MSL(Microstrip Line) is used in LC tuning circuit.(operated by negative feedback) MSL(Microstrip Line), Varactor(Plastic package), low noise TR(SOT-23), chip inductor(1608), chip capacitor(1005), chip resistance(1005). 1005 type is used for sample fabrication of VCO. In the fabrication process, circuit pattern is screen printed on the alumina substrates of over 99.9% purity. Center frequency of the sample VCO is 850MHz at $V_T=1.5V$, while the simulated value was 1.0GHz at $V_T=1.5V$. Variable frequency range of the sample is 860~950MHz in contrast to the 1068~1100MHz of the simulated values.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.05c
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• pp.153-156
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• 2001

In this paper, we present the results of the design and fabrication of the VCO(Voltage controlled Oscillator) using RF circuit simulator GENESYS and electromagnetic field simulator EMpower Frequency range is fabricated VCO is 850 MHz ~ 950 MHz, which is used Colpitts Circuit. the fabricated VCO is consisted of resonator, oscillator and MSL(Microstrip Line) is used in LC tuning circuit.(operated by negative feedback) MSL(Microstrip Line), Varactor(Plastic package), low noise TR(SOT-23), chip inductor(1608), chip capacitor(1005), chip resistance(1005). 1005 type is used for sample fabrication of VCO. In the fabrication process, circuit pattern is screen printed on the alumina substrates of over 99.9% purity. Center frequency of the sample VCO is 850MHz at $V_T$=1.5V, while the simulated value was 1.0GHz at $V_T$=1.5V. Variable frequency range of the sample is 860~950MHz in contrast to the 1068~1100MHz of the simulated values.