• Title/Summary/Keyword: Voltage-controlled frequency tuning

Search Result 121, Processing Time 0.027 seconds

Design of UHF Band Microstrip Antenna for Recovering Resonant Frequency and Return Loss Automatically (UHF 대역 공진 주파수 및 반사 손실 오토튜닝 마이크로스트립 안테나 설계)

  • Kim, Young-Ro;Kim, Yong-Hyu;Hur, Myung-Joon;Woo, Jong-Myung
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.24 no.3
    • /
    • pp.219-232
    • /
    • 2013
  • This paper presents a microstrip antenna which recovers its resonant frequency and impedance shifted automatically by the approach of other objects such as hands. This can be used for telemetry sensor applications in the ultrahigh frequency(UHF) industrial, scientific, and medical(ISM) band. It is the key element that an frequency-reconfigurable antenna could be electrically controlled. This antenna is miniaturized by loading the folded plates at both radiating edges, and varactor diodes are installed between the radiating edges and the ground plane to control the resonant frequency by adjusting the DC bias asymmetrically. Using this voltage-controlled antenna and the micro controller peripheral circuits of reading the returned level, the antenna is designed and fabricated which recovers its resonant frequency and impedance automatically. Designed frequency auto recovering antenna is conformed to be recovered within a few seconds when the resonant frequency and impedance are shifted by the approach of other objects such as hand, metal plate, dielectric and so on.

A Class-C type Wideband Current-Reuse VCO With 2-Step Auto Amplitude Calibration(AAC) Loop (2 단계 자동 진폭 캘리브레이션 기법을 적용한 넓은 튜닝 범위를 갖는 클래스-C 타입 전류 재사용 전압제어발진기 설계)

  • Kim, Dongyoung;Choi, Jinwook;Lee, Dongsoo;Lee, Kang-Yoon
    • Journal of the Institute of Electronics and Information Engineers
    • /
    • v.51 no.11
    • /
    • pp.94-100
    • /
    • 2014
  • In this paper, a design of low power Current-Reuse Voltage Controlled Oscillator (VCO) which has wide tuning range about 1.95 GHz ~ 3.15 GHz is presented. Class-C type is applied to improve phase noise and 2-Step Auto Amplitude Calibration (AAC) is used for minimizing the imbalance of differential VCO output voltage which is main issue of Current-Reuse VCO. The mismatch of differential VCO output voltage is presented about 1.5mV ~ 4.5mV. This mismatch is within 0.6 % compared with VCO output voltage. Proposed Current-Reuse VCO is designed using CMOS $0.13{\mu}m$ process. Supply voltage is 1.2 V and current consumption is 2.6 mA at center frequency. The phase noise is -116.267 dBc/Hz at 2.3GHz VCO frequency at 1MHz offset. The layout size is $720{\times}580{\mu}m^2$.

A Tunable Band-Pass Filter for Multi Bio-Signal Detection (대역폭 조정 가능한 다중 생체 신호 처리용 대역 통과 필터 설계)

  • Jeong, Byeong-Ho;Lim, Shin-Il;Woo, Deok-Ha
    • Journal of IKEEE
    • /
    • v.15 no.1
    • /
    • pp.57-63
    • /
    • 2011
  • This paper presents a tunable band pass filter (BPF) for multi bio-signal detection. The bandwidth can be controlled by the bias current of transconductance (gm), while conventional BPF exploited switchable capacitor array for band selection. With this design technique, the die area of proposed BPF reduced to at least one tenth the area of conventional design. The simulation results show the high cut-off frequency tuning range of from 100Hz to 1Khz. The circuit was implemented with a 0.18um CMOS standard technology. Total current consumption is 1uA at the supply voltage of 1V with sub-threshold design technique.

Optimal Design of VCO Using Spiral Inductor (나선형 인덕터를 이용한 VCO 최적설계)

  • Kim, Yeong-Seok;Park, Jong-Uk;Kim, Chi-Won;Bae, Gi-Seong;Kim, Nam-Su
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.39 no.5
    • /
    • pp.8-15
    • /
    • 2002
  • We optimally designed the VCO(voltage-controlled oscillator) with spiral inductor using the MOSIS HP 0.5${\mu}{\textrm}{m}$ CMOS process. With the developed SPICE model of spiral inductor, the quality factor of spiral inductor was maximized at the operating frequency by varying the layout parameters, e.g., metal width, number of turns, radius, space of the metal lines. For the operation frequency of 2㎓, the inductance of about 3nH, and the MOSIS HP 0.5 CMOS process with the metal thickness of 0.8${\mu}{\textrm}{m}$, oxide thickness of 3${\mu}{\textrm}{m}$, the optimal width of metal lines is about 20${\mu}{\textrm}{m}$ for the maximum Quality factor. With the optimized spiral inductor, the VCO with LC tuning tank was designed, fabricated and measured. The measurements were peformed on-wafer using the HP8593E spectrum analyzer. The oscillation frequency was about 1.610Hz, the frequency variation of 250MHz(15%) with control voltage of 0V - 2V, and the phase noise of -108.4㏈c(@600KHz) from output spectrum.

Design of a Reconfigurable Slot Antenna using Sequentially Voltage-Applied RF MEMS Switches (순차적으로 전압 인가된 RF MEMS스위치를 이용한 재구성 슬롯 안테나의 설계)

  • Shim, Joon-Hwan;Yoon, Dong-Sik;Park, Dong-Kook;Kang, In-Ho;Jung-Chih Chiao
    • Journal of Navigation and Port Research
    • /
    • v.28 no.5
    • /
    • pp.429-434
    • /
    • 2004
  • In this paper, we designed a reconfigurable slot antenna using sequentially voltage-applied RF MEMS switches. In order to obtain pull-in voltage and maximum stress of the MEMS switches, the switch structures in accordance with airgap height was analyzed by ANSYS simulation A actuation voltage of MEMS switches can be determined by switch geometry and airgap height between a movable plate and a bottom plate. The designed lengths of MEMS switches were 240 $\mu\textrm{m}$, 320 $\mu\textrm{m}$, 400 $\mu\textrm{m}$, respectively and the airgap was 6$\mu\textrm{m}$. The total size of the designed slot antenna was 10 mm x 10 mm and the slot length and width were 500 $\mu\textrm{m}$ and 200 $\mu\textrm{m}$, respectively. The length and size of the CPW feedline were 5 mm and 30-80-30 $\mu\textrm{m}$, respectively. and then the size of the CPW in the slot was 50-300-150 $\mu\textrm{m}$. The tuning of the resonant frequency of the proposed device is realized by varying the electrical length of the antenna, which is controlled by applying the DC bias voltages to the RF MEMS switches. The designed slot antenna has been simulated, fabricated and measured.

Design and Implementation of VCO for X-band with Shorted Coupled C type Resonator (접지된 결합 C형 공진기를 이용한 X대역 전압제어 발진기 설계 및 구현)

  • Kim, Jong-hwa;Kim, Gi-rae
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
    • /
    • v.9 no.6
    • /
    • pp.539-545
    • /
    • 2016
  • In this paper, a novel coupled C type resonator is proposed for improvement of phase noise characteristics that is weak point of oscillator using planar type microstrip line resonator. Oscillator using proposed shorted coupled C type resonator is designed, it has improved phase noise characteristics. At the fundamental frequency of 9.8GHz, 4.87dBm output power and -84.7 dBc@100kHz phase noise have been measured for oscillator with shorted coupled C type resonator. Next, we designed voltage controlled oscillator using proposed shorted coupled C type resonator with varactor diode. The VCO has 33.8MHz tuning range from 9.7807GHz to 9.8145GHz, and phase noise characteristic is -115~-112.5dBc/Hz@100KHz. Due to its simple fabrication process and planar type, it is expected that the technique in this paper can be widely used for low phase noise oscillators for both MIC and MMIC applications.

Design and fabrication of the surface mountable VCO operating at 3V for PCS handset (3V에 동작하는 PCS 단말기용 표면실장형 전압제어 발전기의 설계 및 제작)

  • 염경환
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.21 no.3
    • /
    • pp.784-794
    • /
    • 1996
  • In this papre, the design and the fabrication of the surface mountable voltage controlled oscillator is described for local oscillator in PCS(WACS/TDMA) handset. The VCO employs two silicon bipolar transistors of $f_{gamma}$ of 4 GHz as active devices. These are asembled to form the VCO on the 4 layer PCB of the size $12{\times}10mm$which provides the strip line resonator at the third layer. The fabricated VCO shows tuning rage over 50 MHz, phase noise -100 dBc/Hz at the 100 kHz frequency offset, and 0 dBm output power with the consumption of 22 mA at 3V. It is belived that the size will be more reduced by employing 1005 chip components and that the current consumption will be improved by employing transistors of higher $f_{gamma}$.

  • PDF

Ka-band CMOS 2-Channel Image-Reject Receiver (Ka-대역 CMOS 2채널 이미지 제거 수신기)

  • Dongju Lee;Se-Hwan An;Ji-Han Joo;Jun-Beom Kwon;Younghoon Kim;Sanghun Lee
    • The Journal of the Institute of Internet, Broadcasting and Communication
    • /
    • v.23 no.5
    • /
    • pp.109-114
    • /
    • 2023
  • In this paper, a 2-channel Image-Reject receiver using a 65-nm CMOS process is presented for Ka-band compact radars. The designed receiver consists of Low-Noise Amplifier (LNA), IQ mixer, and Analog Baseband (ABB). ABB includes a complex filter in order to suppress unwanted images, and the variable gain amplifiers (VGAs) in RF block and ABB have gain tuning range from 4.5-56 dB for wide dynamic range. The gain of the receiver is controlled by on-chip SPI controllers. The receiver has noise figure of <15 dB, OP1dB of >4 dBm, image rejection ratio of >30 dB, and channel isolation of >45 dB at the voltage gain of 36 dB, in the Ka-band target frequency. The receiver consumes 420 mA at 1.2 V supply with die area of 4000×1600 ㎛.

Design and Fabrication of on Oscillator with Low Phase Noise Characteristic using a Phase Locked Loop (위상고정루프를 이용한 낮은 위상 잡음 특성을 갖는 발진기 설계 및 제작)

  • Park, Chang-Hyun;Kim, Jang-Gu;Choi, Byung-Ha
    • Journal of Navigation and Port Research
    • /
    • v.30 no.10 s.116
    • /
    • pp.847-853
    • /
    • 2006
  • In this paper, we designed VCO(voltage controlled oscillator} that is composed of a dielectric resonator and a varactor diode, and the PLDRO(phase locked dielectric resonator oscillator) that is combined with the sampling phase detector and loop filter. The results at 12.05 GHz show the output power is 13.54 dBm frequency tuning range approximately +/- 7.5 MHz, and power variation over the tuning range less than 0.2 dB, respectively. The phase noise which effects on bits error rate in digital communication is obtained with -114.5 dBc/Hz at 100 kHz offset from carrier, and The second harmonic suppression is less than -41.49 dBc. These measured results are found to be more improved than those of VCO without adopting PLL, and the phase noise and power variation performance characteristics show the better performances than those of conventional PLL.

A Study on the Design and Fabrication of Phase Locked Dielectric Resonance Oscillator (위상고정 유전체 공진형 발진기의 설계 및 제작에 관한 연구)

  • Seo Gon;Park hang-Hyun;Kim Jang-Gu;Choi Byung-Ha
    • Journal of the Institute of Electronics Engineers of Korea TC
    • /
    • v.42 no.3 s.333
    • /
    • pp.25-32
    • /
    • 2005
  • In this papers, we first, therefore, designed VCO(voltage controlled oscillator) that is composed of the dielectric resonator and the varactor diode, and then designed and fabricated PLDRO(phase locked dielectric resonator oscillator) that is combined with the sampling phase detector and loop filter. The measured results of the fabricated PLDRO at 12.05 [GHz] show the output power is 13.54 [dBm], frequency tuning range approximately +/- 7.5 [MHz], and Power variation over the tuning range less than 0.2 [dB], respectively. The phase noise which effects on bits error rate in digital communication is obtained with -114.5 [dBc/Hz] at 100 [KHz] offset from carrier, and The second harmonic suppression is less than -41.49 [dBc]. These measured results are found to be more improved than those of VCO without adopting PLL, and the phase noise and power variation performance characteristics show the better performances than those of conventional PLL.