• 조명전기설비학회논문지
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• 제25권1호
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• pp.113-117
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• 2011

As one of the countermeasures to solve the increase of the fault current in a power system, the superconducting fault current limiter (SFCL) has been noticed together with the development of a various types of SFCL, which has accelerated the researches to apply a SFCL into a power system. Among the developed SFCLs, the transformer type SFCL is expected to be available for adjusting the voltage and the current ratings of the SFCL. In this paper, the fault current limiting and the bus line‘s voltage sag suppressing effect by the transformer type SFCL were investigated and the case without the transformer type SFCL was compared as well. Through the analysis on the results of the short-circuit tests, the fault current limiting and the bus-line voltage suppressing characteristics of the transformer type SFCL could be confirmed to be effectively performed.

• 한국ITS학회 논문지
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• 제8권6호
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• pp.173-179
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• 2009

본 논문에서는 순시전압강하 보상장치 등의 전력변환시스템에 사용되는 수퍼 커패시터(또는 전기이중층콘덴서; EDLC)의 고장진단을 위한 파라미터의 측정기법에 관한 연구를 수행하였다. 직류 에너지의 저장을 위한 기존의 장치에는 납축전지 또는 전해 커패시터를 사용하여 왔으나 환경문제 및 에너지밀도의 측면에서 불리하여 최근에는 수퍼 커패시터의 사용이 주목을 받고 있다. 따라서 본 논문에서는 이러한 수퍼 커패시터의 내부 특성 및 고장 마모 등을 분석하기 위한 커패시터의 등가직렬저항(ESR) 및 정전용량을 측정하는 기법을 제시하여 고장진단의 주요한 데이터에 활용이 가능토록 하였으며, 또한 수퍼 커패시터를 적용한 순간전압강하에 대한 응용 실험을 수행하여 그 결과를 함께 제시하였다.

• 전기학회논문지P
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• 제63권2호
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• pp.95-101
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• 2014

In this paper, UPS, with a built-in instantaneous sag drop compensation features, was developed to improve performance. The improved UPS, using instantaneous moving average method, compensates by quickly measuring the voltage and series inverter of half-bridge type, using line-interactive method that links with the voltage of the battery and power source, was developed. In addition, by developing a parallel inverter that uses a high-efficiency PWM switching method, overall UPS system was enhanced. To verify the performance of the proposed algorithm, single-phase 5[kVA] UPS systems were designed and the experimental system was constructed. The low-cost type of Cortex-M3 module CPU STM32F103R8T6 (32[bit]) is attached and the switching time of mode transfer was set within 4 [ms]. THD of the linear load operates in less than 3[%], and the stability of the output voltage operates in approximately ${\pm}2[%]$ range. The superior performance of the operations was confirmed with the system set as above.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2006년도 제37회 하계학술대회 논문집 A
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• pp.460-461
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• 2006

Computer Loads can be found in all of modern society. The switching mode power supplies used in personal computers are major sources of harmonic currents. Harmonic currents can cause lots of harmonic problems such as disruption in computer performance. A series resonant filter is very effective in harmonic reduction for personal computer loads. Voltage sags are short duration reductions in rms voltage. The main causes of voltage sags are faults, motor starting, and transformer energizing. Personal computers are another example of devices sensitive to voltage sags. A serious voltage sag at the terminals way lead mis-operation of the equipment. This paper presents an in depth analysis to evaluate the effect of harmonics reduction based on the IEC 61000-3-2 and the effect of voltage sag using ITI curve by applying a series resonant filter for personal computer loads.

• 대한전기학회논문지:전력기술부문A
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• 제54권6호
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• pp.315-322
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• 2005

In this article, 1 would like to explore the estimation method of time-varying voltage sags in large industrial systems considering the short circuit contributions of rotating machines. For the power distribution system of KEPCO(Korea Electric Power Corporation), the magnitude of initial symmetrical short circuit current is generally not changed. However, in industrial systems which contain a number of rotating machines, the magnitude of voltage sag is generally changed from the initial to the clearing time of a fault due to the decreasing contribution of rotating machines for a fault current. The time-varying characteristics of voltage sags can be calculated using a short circuit analysis that is considered the time-varying fault currents. For this, the prediction formulations of time-varying voltage sags are proposed using a foreign standard. The proposed method contains the consideration of generator and motor effects. For the test of proposed formulations, a simple system of industrial consumer is used for the comparison conventional and proposed estimation method of voltage sag characteristics.

• Journal of Power Electronics
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• 제15권1호
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• pp.235-245
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• 2015

This paper proposes a reactive current assignment and control strategy for a doubly-fed induction generator (DFIG) based wind-turbine generation system under generic grid voltage sag or swell conditions. The system's active and reactive power constrains during grid faults are investigated with both the grid- and rotor-side convertors (GSC and RSC) maximum ampere limits considered. To meet the latest grid codes, especially the low- and high-voltage ride-through (LVRT and HVRT) requirements, an adaptive reactive current control scheme is investigated. In addition, a torque-oscillation suppression technique is designed to reduce the mechanism stress on turbine systems caused by intensive voltage variations. Simulation and experiment studies demonstrate the feasibility and effectiveness of the proposed control scheme to enhance the fault ride-through (FRT) capability of DFIG-based wind turbines during violent changes in grid voltage.

• 전력전자학회논문지
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• 제6권2호
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• pp.173-179
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• 2001

본 논문은 배전계통의 전력품질 개선을 위한 순시 전압강하 보상기의 제어 알고리즘에 대한 연구를 수행하였다. 특별히 순시적인 전압강하의 원인중 가장 대표적인 1선 지락사고 시에 발생하는 불평형과 비대칭 문제를 해석하기 위하여 새로운 대칭성분 검출 기법을 제안하였다. 제안되 방법은 간단한 연산만을 사용하며, 전압보상을 위한 대칭성분의 제어 기준값이 별도의 위상검출 과정을 거치지 않고도 직류 값으로 표현되도록 하였다. 그리고 기준전압의 발생 시에 IEC에서 규정하고 있는 UF와 MF를 사용하도록 하였다. 제안된 제어기법을 사용하면 보상장치는 매우 빠른 응답특성을 가지고 보상된 전압 파형의 총고조파왜형률(THD)도 매우 낮게 된다. 마지막으로 EMTDC 시뮬레이션과 실험을 통하여 제안된 방법의 타당성을 입증하였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 하계학술대회 논문집 B
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• pp.973-975
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• 2002

Voltage Sags are the short-duration reductions in rms voltage caused by faults in the electric supply system and the starting of large loads, such as motors. In this paper, we use the dq transformation(dq stationary frame and dq synchronous rotating frame) for series voltage sag compensation algorithm. Analysis, simulation results are presented for voltage sags on a three-phase balanced voltage source.

• 전기학회논문지
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• 제64권11호
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• pp.1611-1617
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• 2015

This paper presents an effective approach for establishing countermeasures against voltage sags based on the concept of area of severity. In order to apply preventive measures against faults such as lightning arrester, overhead earth wires and so on, it is important to find optimal points for installing the preventive measures. The optimal points can be determined by the calculation of the area of severity(AOS) to voltage sags and the expected sag frequency per unit length of line. In this paper, an effective method to find optimal points to apply countermeasures against voltage sags is addressed with case studies.

• 조명전기설비학회논문지
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• 제27권12호
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• pp.133-140
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• 2013

Cascaded H-Bridge multi-level inverters can be implemented through the series connection of single-phase modular power bridges. In recent years, multi-level inverters are becoming increasingly popular for high power applications due to its improved harmonic profile and increased power ratings. This paper presents a control method for balancing the dc-link voltage and ride-through enhancement, a modified pulse width-modulation Compensation algorithm of cascaded H-bridge multi-level inverters. During an under-voltage protection mechanism, causing the system to shut down within a few milliseconds after a power interruption in the main input sources. When a power interruption occurs finish, if the system is a large inertia restarting the load a long time is required. This paper suggests modifications in the control algorithm in order to improve the sag ride-through performance of ac inverter. The new proposed strategy recommends maintaining the DC-link voltage constant at the nominal value during a sag period, experimental results are presented.