• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 하계학술대회 논문집 A
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• pp.118-120
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• 2002

Voltage drop of low voltage distribution line is closely related with proper voltage regulation. It depends on the voltage drop of pole transformer, low voltage distribution line, and low voltage customer entrance line. Using above voltage drop factors, we proposes an estimation method of voltage drop in low voltage distribution line. Proposed method has been applied to a 22.9kV practical distribution system.

• 전기학회논문지P
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• 제65권1호
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• pp.1-6
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• 2016

Recently, proportion of the induction motor load is gradually increased. When a contingency in the power systems, it has been discovered phenomenon that the voltage is delayed recover caused mechanical characteristics of the induction motor load. It can be a serious impact on the voltage stability of the power system considering induction motor load. The scheme to mitigate this phenomenon tripping off the motors to prevent voltage drop and delayed voltage recovery on the load demand side. Fault induced delayed voltage recovery phenomenon is caused by stalling of small induction motor load in transmission level contingencies. In this paper, fault induced delayed voltage recovery phenomenon mitigation method implementation under voltage load shedding on the korean power system considering induction motor load.

• JSTS:Journal of Semiconductor Technology and Science
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• 제15권6호
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• pp.664-670
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• 2015

A four-times-VDD switch that supports high and low voltage mode operations is demonstrated in a generic 65 nm logic process. The proposed switch shows the robust operation for supply voltages ranging from VDD to $4{\times}VDD$. A cascaded voltage switch and a voltage doubler based charge pump generate the intermediate supply voltage levels required for the proposed high voltage switch. All the high voltage circuits developed in this work can be implemented using standard logic transistors without being subject to any voltage overstress.

• 한국융합학회논문지
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• 제4권1호
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• pp.33-41
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• 2013

This paper presents an adaptive recursive least squares algorithm (ARLS) for detecting voltage sag and voltage swell events in power systems. Different methods have been developed to detect voltage sag and voltage swell. Some of them use window techniques, which are too slow when voltage sag or swell mitigation is required. Others depend on the extraction of a single non-stationary sinusoidal signal out of a given multi-components input signal, and therefore they don't consider the harmonic components in calculating the voltage root mean square value (rms). The method, proposed in this paper, is capable of estimating the voltage rms taking into account all harmonic components. The method is tested by applying it to different, simulated signals using ATP program, and compared with voltage sag detection algorithms.

• 전력전자학회논문지
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• 제22권5호
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• pp.397-403
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• 2017

This paper studies the voltage angle control of interior permanent magnet synchronous motors (IPMSMs). For voltage angle control, the optimum voltage angle trajectory according to the operating speed is researched while the voltage and current limit conditions are considered. Through research, two different optimum voltage angle trajectories that depend on the design of IPMSMs were found. The IPMSM drive based on a voltage angle control that follows such trajectory is proposed. Unlike the conventional voltage angle control method, which is applied only in the flux-weakening region, the proposed voltage angle control can be implemented in all operation ranges from low to high speed. The proposed method is verified by experiments using a DSC controller for 800 W IPMSM.

• Journal of Power Electronics
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• 제16권1호
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• pp.1-8
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• 2016

Dead time is typically incorporated in voltage source inverter systems to prevent short circuit cases. However, dead time causes an error between the output voltage and reference voltage. Hence, voltage equation-based algorithms, such as motor parameter estimation and back electromotive force (EMF)-based sensorless algorithms, are prone to estimation errors. Several dead-time compensation methods have been developed to reduce output voltage errors. However, voltage errors are still common in zero current crossing areas, and an effect of the error is much worse in a low speed region. Therefore, employing voltage equation-based algorithms in low speed regions is difficult. This study analyzes the conventional dead-time compensation method and output voltage errors in low speed operation areas. A current shaping method that can reduce output voltage errors is also proposed. Experimental results prove that the proposed method reduces voltage errors and improves the accuracy of the parameter estimation method and the performance of the back EMF-based sensorless algorithm.

• 전기학회논문지P
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• 제65권3호
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• pp.178-182
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• 2016

FIDVR(Fault Induced Delayed Voltage Recovery) is a phenomenon that recovery of the system voltage level delays after the fault. Cause of FIDVR phenomenon is motor load characteristic about voltage and reactive power. In low voltage condition, the motor go to stall state that consume large amount of reactive power. As a result, the voltage recovery problem is that of repeated occurrences of sustained low voltage following faults on the system. In this paper, analysis the characteristics of the motor load. And using the korean power system actual data, perform a case studies to voltage delay recovery phenomenon alleviation method. Change of each parameters by analyzing the effect on system and selecting an influence parameter. In addition, dynamic characteristic analysis of the resulting difference in the proportion by the motor load in power systems, considering the effect on the voltage stability.

• Journal of Power Electronics
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• 제19권6호
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• pp.1477-1485
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• 2019

This paper proposes an effective model predictive current control (MPCC) that involves using 10 virtual voltage vectors to reduce the current harmonics and common-mode voltage (CMV) for a two-level five-phase voltage source inverter (VSI). In the proposed scheme, 10 virtual voltage vectors are included to reduce the CMV and low-order current harmonics. These virtual voltage vectors are employed as the input control set for the MPCC. Among the 10 virtual voltage vectors, two are applied throughout the whole sampling period to reduce current ripples. The two selected virtual voltage vectors are based on location information of the reference voltage vector, and their duration times are calculated using a simple algorithm. This significantly reduces the computational burden. Simulation and experimental results are provided to verify the effectiveness of the proposed scheme.

• 한국정보통신학회논문지
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• 제18권6호
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• pp.1422-1428
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• 2014

본 연구에서는 비대칭 이중게이트(double gate; DG) MOSFET의 하단 게이트전압에 대한 문턱전압이동 현상에 대하여 분석하였다. 비대칭 DGMOSFET는 4단자소자로서 상단과 하단의 게이트단자에 별도의 전압을 인가할 수 있으므로 하단게이트전압의 변화가 문턱전압에 영향을 미칠 것이다. 그러므로 단채널효과로 알려져 있는 문턱전압 이동현상이 하단게이트전압에 의하여 감소할 수 있는지를 관찰하고자 한다. 이를 위하여 문턱전압이하영역에서의 차단전류모델을 제시하였으며 차단전류가 채널폭 당 $10^{-7}A/{\mu}m$일 경우의 상단게이트 전압을 문턱전압으로 정의하여 채널길이 및 채널두께의 변화에 따라 하단게이트 전압의 변화에 대한 문턱전압의 이동현상을 관찰하였다. 결과적으로 하단게이트전압은 문턱전압이동현상에 커다란 영향을 미치는 것을 알 수 있었으며, 특히 단채널효과가 심각하게 발생하고 있는 채널길이 및 채널두께 영역에서는 더욱 큰 영향을 미치고 있다는 것을 알 수 있었다.

• 전기학회논문지
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• 제62권3호
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• pp.355-364
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• 2013

Respect to the input AC voltage and output DC voltage, conventional three-phase PWM rectifier is classified as the voltage type rectifier with boost capability and the current type rectifier voltage with buck capability. Conventional PWM rectifier can not at the same time the boost and buck capability and its bridge is weak in the shoot- through state. These problems can be solved by Z-source PWM rectifier which has all characteristic of voltage and current type PWM rectifier. By shoot-through duty ratio control, the Z-source PWM rectifier can buck and boost at the same time, also, there is no need to consider the dead time. This paper proposes the input AC voltage sensorless control method of a three-phase Z-source PWM rectifier in order to accomplish the unity input power factor and output DC voltage control. The proposed method is estimated the input AC voltage by using input AC current and output DC voltage, hence, the sensor for the input AC voltage detection is no needed. comparison of the estimated and detected input AC voltage, estimated phase angle of the input voltage, the output DC voltage response for reference value, unity power factor, FFT(Fast Fourier Transform) of the estimated voltage and efficiency are verified by PSIM simulation.