• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.7
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• pp.1468-1476
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• 1997

In mobile communication systems, the Reduced State Sequence Estimation(RSSE) receiver must be able to track changes in the channel. This is carried out by the adaptive channel estimator. However, when the tentative decisions are used in the channel estimator, incorrect decisions can cause error propagation. This paper presents a new channel estimator using the path history in the Viterbi decoder for preventing error propagation. The selection of the path history in the Viterbi decoder for preventing error propagation. The selection of the path history for the channel estimator depends on the path metric as in the decoding of the Viterbi decoder in RSSE. And a discussion on the channel estimator with different adaptation algorithms such as Least Mean Square(LMS) algorithm and Recursive Least Square(RLS) algorithm is provided. Results from computer simulations show that the RSSE receivers using the proposed channel estimator have better performance than the other conventional RSSE receiver, and that the channel estimator with RLS algorithm is adequate for multipath fading channel.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.1
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• pp.36-44
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• 2003

This paper proposes a Viterbi decoding scheme without trace-back operations to reduce the amount of memory storing the survivor path information, and to increase the decoding speed. The proposed decoding scheme is a modified register exchange scheme, and is verified by a simulation to give the same results as those of the conventional decoders. It is compared with the conventional decoding schemes such as the trace-back and the register exchange scheme. The memory size of the proposed scheme is reduced to 1/(5 x constraint length) of that of the register exchange scheme, and the throughput is doubled compared with that of the trace-back scheme. A decoder with a code rate of 2/3, a constraint length, K＝3 and a trace-back depth of 15 is designed using VHDL and implemented in an FPGA. It is also shown that the modified register exchange scheme can be applied to a block decoding scheme.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.2
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• pp.164-167
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• 2005

Recently, STC techniques have been considered to be candidate to support multimedia services in the next generation mobile radio communications and have been developed the many communications systems in order to achieve the high data rates. In this paper, we propose the Trellis-Coded Differential Space Time Modulation system with multiple symbol detection. The Trellis-code performs the set partition with unitary group codes. The Viterbi decoder containing new branch metrics is introduced in order to improve the bit error rate (BER) in the differential detection of the unitary differential space time modulation. Also, we describe the Viterbi algorithm in order to use this branch metrics. Our study shows that such a Viterbi decoder improves BER performance without sacrificing bandwidth and power efficiency.

• The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
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• v.3 no.2
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• pp.30-38
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• 1992

In this paper, in order to apply the $\pi$/4 shift QPSK to TCM, we propose the $\pi$/8 shift 8PSK modulation technique and the trellis-coded $\pi$/8 shift 8PSK performing signal set expansion and set partition by phase difference. In addition, the Viterbi decoder with branch metrics of the squared Euclidean distance of the first phase difference as well as the Lth phase difference is introduced in order to improve the bit error rate(BER) performance in differential detection of the trellis-coded $\pi$/8 shift 8 PSK. The proposed Viterbi decoder is conceptually the same as the sliding multiple de- tection by using the branch metric with first and Lth order phase difference. We investigate the performance of the uncoded .pi. /4 shift QPSK and the trellis-coded $\pi$/8 shift 8PSK with or without the Lth phase difference metric in an additive white Gaussian noise (AWGN) and Rayleigh fading channel using the Monte Carlo simulation. The study shows that the $\pi$/4 shift QPSK with the Trellis-code i. e. the trellis-coded $\pi$/8 shift 8PSK is an attractive scheme for power and bandlimited systems and especially, the Viterbi decoder with first and Lth phase difference metrics improves BER performance. Also, the next proposed algorithm can be used in the TC $\pi$/8 shift 8PSK as well as TC MDPSK.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.1 s.343
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• pp.17-26
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• 2006

The analog Viterbi decoder for the PR (1 2 2 1) which is used for BVD read channel is designed with circular analog parallel circuits. Since the inter symbol interference is serious problem in the high density magnetic storage device or DVD, the PRML technology is normally employed for the purpose of minimizing the decoding error. The feature of the PRML technology is with the multi-level coding according to the predetermined combining rule among the neighboring symbols and with the decoding according to the known combining rule. Though the conventional PRML technology is implemented with the digital circuits, the recent trend towards this end is with the utilization of the analog circuits due to the requirements of higher speed and lower power in the DVD read channel. In this study, the Viterbi decoder which is the bottleneck of the PRML implementation is designed with the analog parallel circuit structure. The designed Viterbi decoder for the PR (1 2 2 1) signal shows 3 times faster in the speed and 1/3 times less in the power consumption than thoseoftheconventionaldigitalcounterpart.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.43 no.3 s.345
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• pp.59-67
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• 2006

OFDM (Orthogonal frequency Division Multiplexing) systems convert serial data stream to N parallel data streams and modulate them to N orthogonal subcarriers. Thus spectrum utilization efficiency of the OFDM systems are high and high-speed data transmission is possible. However, with the OFDM systems using the same modulation method at all subcarriers, the error probability is dominated by the subcarriers which experience deep fades. Therefore, in order to enhance the performance of the system adaptive modulation is required, with which the modulation methods of the subcarriers are determined according to the estimated SNRs. The IEEE 802.11a system selects various transmission speed between 6 and 54 Mbps according to the modulation mode. There are three typical methods for SNR estimation: Direct estimation method uses the frequency domain symbols to estimate SNR directly by minimizing MSE (Mean Square Error), EVM method utilizes the distance between the demodulated constellation points and received complex values, and the method utilizing the Viterbi algorithm uses the cumulative minimum distance in decoding process to estimate the SNR indirectly. Through comparison analyses of three methods we propose a new SNR estimation method, which employs both the EVM method and the Viterbi algorithm. Finally, we perform extensive computer simulations to confirm the performance improvement of the proposed adaptive OFDM systems on the basis of IEEE 802.11a.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.40 no.5
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• pp.397-409
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• 2003

This paper describes an implementation of radix-4 trellis parallel architecture and backward state transition control trace back Viterbi decoder, and presents the application results to high speed wireless LAN. The radix-4 parallelized architecture Vietrbi decoder can not only improve the throughput with simple structure, but also have small processing delay time and overhead circuit compared to M-step trellis architecture one. Based on these features, this paper addresses a novel Viterbi decoder which is composed of branch metric computation, architecture of ACS and trace back decoding by sequential control of backward state transition for the implementation of radix-4 trellis parallelized structure. With the proposed architecture, the decoding of variable code rate due to puncturing the base code can easily be implemented by the unified Viterbi decoder. Moreover, any additional circuit and/or peripheral control logic are not required in the proposed decoder architecture. The trace back decoding scheme with backward state transition control can carry out the sequential decoding according to ACS cycle clock without additional circuit for survivor memory control. In order to evaluate the usefulness, the proposed method is applied to channel CODEC of the IEEE 802.11a high speed wireless LAN, and HDL coding simulation results are presented.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 2006.07a
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• pp.415-415
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• 2006

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 2004.07a
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• pp.403-403
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• 2004

• Information and Communications Magazine
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• v.12 no.6
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• pp.88-100
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• 1995

본 고에서는 디지털 위성방송 시스템의 구성요소중 channel부의 구조 및 기능분석을 국내 디지털 DBS를 기준으로 설명하였다. channel부는 channel coding과 modulation 기능을 수행한다. Channel coding은 Reed Solomon code, interleaving, convolutional code를 연집하여 사용하고, modulation은 QPSK와 raised cosine pulse shaping을 한다. 수신기의 channel부는 antenna, LNB, tuner, QPSK 복조기, Viterbi, deinterleaver, RS decoder로 구성되어있다.