• 제목/요약/키워드: Via Hole

검색결과 299건 처리시간 0.039초

Constrained Sintering에 의한 $Al_2O_3$/LTCC/$Al_2O_3$ 무수축 기판의 LTCC 두께에 따른 Edge Curvature 제어

  • Jo, Jeong-Hwan;Yeo, Dong-Hun;Sin, Hyo-Sun;Hong, Yeon-U;Kim, Jong-Hui;Nam, San
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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    • pp.301-301
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    • 2008
  • 최근의 세라믹 공정기술은 고집적화 추세에 따라 그린시트의 두께가 얇아지면서 다층화되고 있으므로 fine patterning, Via Hole 크기의 최소화, Via Hole 간의 층간 연결을 위한 그린시트 층간 정밀도가 더욱 중요해지고 있다. 따라서 세라믹의 소성후 수축율 제어는 고집적 세라믹 기판 모듈 제작을 위한 핵심공정기술로 기술 개발에 대한 필요성이 증대되고 있다. 온 연구에서는 일축가압 이용한 PAS법 (Pressure Assisted Constrained Sintering)과 Al2O3를 희생층으로 이용한 Constrained법을 혼합하여 저온 동시소성 세라믹 기판의 x-y축 방향의 수축율을 zero로 제어하고자하였다. Al2O3/LTCC/Al2O3인 샌드위치 구조로 세라믹 시트를 적층하여 Load에 따른 소성수축율 및 LTCC 두께에 따른 Edge Curvature의 Radius를 측정하였다. 그 결과 소성온도 $900^{\circ}C$에서 Constrian Layer $500{\mu}m$, Load 0.92kg/cm3일때 LTCC의 두께가 $400{\mu}m$에서 $2500{\mu}m$로 증가함에 따라 Edge Curvature Radius가 $430{\mu}m$에서 $2200{\mu}m$로 증가하는 것을 확인하였다. 이때 소결 밀도는 2.95g/$cm^3$로 우수한 특성을 나타내었다.

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A Semi-MMIC Hair-pin Resonator Oscillator for K-Band Application (K-Band용 SEmi-MMIC Hair-pin 공진발진기)

  • 이현태
    • The Journal of Korean Institute of Communications and Information Sciences
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    • 제25권9B호
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    • pp.1635-1640
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    • 2000
  • In this paper, a 18 GHz oscillator is designed with the push-push method an fabricated by semi-MMIC process, in which the second harmonic is the main output signal with the suppressed fundamental mode. In semi-MMIC process, passive components with microstrip transmission line are implemented using MMIC process on semi-insulating GaAs substrate. Then, chip types of P-HEMT, resistors, and capacitors are connected through Au wire-bonding. Also, the ground plane is inserted around the circuit and connected each other with the back-side of substrate through Au wire-bonding instead of via-hole. The semi-MMIC push-push oscillator shows the output powder of -10.5 dBm, the fundamental frequency suppression of -17.3 dBc/Hz, and the phase noise of -97.9 dBc/Hz at the offset frequency of 100 kHz.

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A Study on Improvement of FBAR Duplexer for Wireless Systems (무선 시스템용 FBAR 듀플렉서 특성 개선 연구)

  • Lee, Eun-Kyu;Choi, Hyung-Rim
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • 제23권5호
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    • pp.388-396
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    • 2010
  • In this study, we propose characteristics improvement methods according to via hole plating method for FBAR Duplexer with bandwidth($T_x4: 1850 MHz ~ 1910 MHz, $R_x$:1930 MHz ~ 1990 MHz) which is used for wireless systems. Also, we designed and fabricated $3.8{\times}3.8{\times}1.8mm$ size microminiature FBAR Duplexer based on this proposal. First of all, in this study, we fabricated pentagon shape resonators by different size to make filter combination, and their quality factor(Q) are 687 with 6.6% of ${k_{eff}}^2$. Using this resonators, we designed $3{\times}2$ Type $T_x$ filter and $3{\times}4$ Type $R_x$ filter. The transmission line, which works as phase shifter, is designed with 210 ${\mu}m$ in width and 18 mm in length Stripline type. Inductor, which is used for matching component, is designed with width of 75 ${\mu}m$, a technically achievable minimum width. And adopted plating method of filling via hole with conductive epoxy for improved grounding and thermal conductivity. Using these configuration with all of the matching component values, we found Duplexer characteristics of -1.57 dB ~ -1.73 dB in insertion loss, -56 dB in attenuation at 1850 MHz ~ 1910 MHz of $T_x$ band. Also, found -2.71 dB ~ -3.23 dB in insertion loss, -58 dB in attenuation at 1930 MHz ~ 1990 MHz of $R_x$ band.

Manufacturing of Copper(II) Oxide Powder for Electroplating from NaClO3 Type Etching Wastes

  • Hong, In Kwon;Lee, Seung Bum;Kim, Sunhoe
    • Journal of Electrochemical Science and Technology
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    • 제11권1호
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    • pp.60-67
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    • 2020
  • In this study, copper (II) oxide powder for electroplating was prepared by recovering CuCl2 from NaClO3 type etching wastes via recovered non-sintering two step chemical reaction. In case of alkali copper carbonate [mCuCo3·nCu(OH)2], first reaction product, CuCo3 is produced more than Cu(OH)2 when the reaction molar ratio of sodium carbonate is low, since m is larger than n. As the reaction molar ratio of sodium carbonate increased, m is larger than n and Cu(OH)2 was produced more than CuCO3. In the case of m has same values as n, the optimum reaction mole ratio was 1.44 at the reaction temperature of 80℃ based on the theoretical copper content of 57.5 wt. %. The optimum amount of sodium hydroxide was 120 g at 80℃ for production of copper (II) oxide prepared by using basic copper carbonate product of first reaction. At this time, the yield of copper (II) oxide was 96.6 wt.%. Also, the chloride ion concentration was 9.7 mg/L. The properties of produced copper (II) oxide such as mean particle size, dissolution time for sulfuric acid, and repose angle were 19.5 mm, 64 second, and 34.8°, respectively. As a result of the hole filling test, it was found that the copper oxide (II) prepared with 120 g of sodium hydroxide, the optimum amount of basic hydroxide for copper carbonate, has a hole filling of 11.0 mm, which satisfies the general hole filling management range of 15 mm or less.

Study on Via hole formation in multi layer MCM-D substrate using photosensitive BCB (감광성 BCB를 사용한 다층 MCM-D 기판에서 비아홀 형성에 관한 연구)

  • 주철원;최효상;안용호;정동철;김정훈;한병성
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 한국전기전자재료학회 2000년도 하계학술대회 논문집
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    • pp.99-102
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    • 2000
  • Via for achieving reliable fabrication of MCM-D substrate was formed on the photosensitive BCB layer. MCM-D substrate consists of photosensitive BCB(Benzocyclobutene) interlayer dielectric and copper conductors. In order to form the vias in photosensitive BCB layer, the process of BCB and plasme etch using $C_2$F$_{6}$ gas were evaluated. The thickness of BCB after soft bake was shrunk down to 60% of the original. AES analysis was done on two vias, one is etched in $C_2$F$_{6}$ gas and the other is non etched. On via etched in $C_2$F$_{6}$, native C was detected and the amount of native C was reduced after Ar sputter. On via non etched in $C_2$F$_{6}$, organic C was detected and amount of organic C was reduced a little after Ar sputter. As a result of AES, BCB residue was not removed by Ar sputter, so plasma etch is necessary for achieving reliable via.ble via.

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Electromigration Characteristics Stduy DCV Interconnect Structures in Cu Dual-Damascene Process (Cu Dual Damascene 배선 공정에서의 DCV 배선구조의 EM 특성 연구)

  • Lee, Hyun-Ki;Choi, Min-Ho;Kim, Nam-Hoon;Kim, Sang-Yong;Chang, Eui-Goo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 한국전기전자재료학회 2005년도 하계학술대회 논문집 Vol.6
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    • pp.123-124
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    • 2005
  • We investigated the effect of a Ta/TaN Cu diffusion barrier existence on the reliability and the electrical performance of Cu dual-damascene interconnects. A high EM performance in Cu dual-damascene structure was observed the BCV(barrier contact via) interconnect structure to remain Ta/TaN barrier layer. Via resistance was decreased DCV interconnect structure by bottomless process. This structure considers that DCV interconnect structure has lower activation energy and higher current density than BCV interconnect structure. The EM failures by BCV via structure were formed at via hole, but DCV via structure was formed EM fail at the D2 line. In order to improve the EM characteristic of DCV interconnect structure by bottomless process, after Ta/TaN diffusion barrier layer in via bottom is removed by Ar+ resputtering process, it is desirable that Ta thickness is thickly made by Ta flash process.

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Patent Trend Report for PCB Parallel Build-up (PCB일괄적층에 관한 특허동향분석)

  • Jeong, In-Seong;Lee, Young-Uk
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 한국전기전자재료학회 2006년도 하계학술대회 논문집 Vol.7
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    • pp.14-15
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    • 2006
  • Application of the parallel Build-up is increasing continuously. This report presents about the PCB Build-up technology since 2000. Among the parallel build-up technologies, PALAP application - after making the via, filling the via with electric conductive paste, then expose to make wiring pattern and put them by layer without any glue or middle - is actively developing, especially DENSO company.

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Warpage and Stress Simulation of Bonding Process-Induced Deformation for 3D Package Using TSV Technology (TSV 를 이용한 3 차원 적층 패키지의 본딩 공정에 의한 휨 현상 및 응력 해석)

  • Lee, Haeng-Soo;Kim, Kyoung-Ho;Choa, Sung-Hoon
    • Journal of the Korean Society for Precision Engineering
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    • 제29권5호
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    • pp.563-571
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    • 2012
  • In 3D integration package using TSV technology, bonding is the core technology for stacking and interconnecting the chips or wafers. During bonding process, however, warpage and high stress are introduced, and will lead to the misalignment problem between two chips being bonded and failure of the chips. In this paper, a finite element approach is used to predict the warpages and stresses during the bonding process. In particular, in-plane deformation which directly affects the bonding misalignment is closely analyzed. Three types of bonding technology, which are Sn-Ag solder bonding, Cu-Cu direct bonding and SiO2 direct bonding, are compared. Numerical analysis indicates that warpage and stress are accumulated and become larger for each bonding step. In-plane deformation is much larger than out-of-plane deformation during bonding process. Cu-Cu bonding shows the largest warpage, while SiO2 direct bonding shows the smallest warpage. For stress, Sn-Ag solder bonding shows the largest stress, while Cu-Cu bonding shows the smallest. The stress is mainly concentrated at the interface between the via hole and silicon chip or via hole and bonding area. Misalignment induced during Cu-Cu and Sn-Ag solder bonding is equal to or larger than the size of via diameter, therefore should be reduced by lowering bonding temperature and proper selection of package materials.

Design of Dual-Band Chip Antenna using LTCC Multilayer Technology (LTCC 적층 기술을 이용한 이중대역 칩 안테나의 설계)

  • Kim Young Do;Won Chung Ho;Lee Hong Min
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • 제42권3호
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    • pp.19-24
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    • 2005
  • This paper presents design simulation, implementation, and measurement of a miniaturized GPS/K-PCS dual-band LTCC chip antenna for mobile communication handsets. The dimension of LTCC chip antenna is $9mm\times15mm\times1.2mm$. The meander type radiating patch for dual-band operation is realized by using via holes with 0.3mm height to connect upper and lower-layer antenna. The lower meander type antenna is to be tuned to the lower frequency (GPS) band. The upper meander antenna with via hole connection is to contribute the higher frequency (K-PCS) band. The resonant frequency and frequency ratio of the proposed antenna can be adjusted by changing the height of via-hole and effective path of meander radiating patch. The electrical characteristics of the meander chip antenna applied to a GPS/K-PCS are suitable for mobile communication application.

Channel Statistical MAC Protocol for Cognitive Radio

  • Xiang, Gao;Zhu, Wenmin;Park, Hyung-Kun
    • Journal of information and communication convergence engineering
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    • 제8권1호
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    • pp.40-44
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    • 2010
  • opportunistic spectrum access (OSA) allows unlicensed users to share licensed spectrum in space and time with no or little interference to primary users, with bring new research challenges in MAC design. We propose a cognitive MAC protocol using statistical channel information and selecting appropriate idle channel for transmission. The protocol based on the CSMA/CA, exploits statistics of spectrum usage for decision making on channel access. Idle channel availability, spectrum hole sufficiency and available channel condition will be included in algorithm statistical information. The model include the control channel and data channel, the transmitter negotiates with receiver on transmission parameters through control channel, statistical decision results (successful rate of transmission) from exchanged transmission parameters of control channel should pass the threshold and decide the data transmission with spectrum hole on data channel. A dynamical sensing range as a important parameter introduced to maintain the our protocol performance. The proposed protocol's simulation will show that proposed protocol does improve the throughput performance via traditional opportunistic spectrum access MAC protocol.