• Title/Summary/Keyword: Vertical Logic

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수렴적, 발산적 접근에 의한 창의적 사고방법 (Creative Thinking Methodology by Convergent and Divergent Approaches)

  • 최성운
    • 대한안전경영과학회:학술대회논문집
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    • 대한안전경영과학회 2011년도 추계학술대회
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    • pp.219-224
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    • 2011
  • The research reviews the logical approach based on the creative thoughts. The two logical approaches, including deductive convergent and inductive divergent are discussed with why-why techniques and how-how techniques. While the deductive thinking is vertical logic for interconnected hierarchical and deep domains, the inducive thinking is horizontal logic for mutually exclusive and collectively exhausted frameworks. The creative thinking comes from the reversing the logic and lessening the premise of convergent and divergent approaches.

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집적화된 광 싸이리스터와 수직구조 레이저를 이용한 광 로직 AND/OR 게이트에 관한 연구 (Optical AND/OR gates based on monolithically integrated vertical cavity laser with depleted optical thyristor)

  • 김두근;정인일;최영완;최운경
    • 한국정보통신설비학회:학술대회논문집
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    • 한국정보통신설비학회 2006년도 하계학술대회
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    • pp.19-23
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    • 2006
  • Latching optical switches and optical logic gates AND and OR are demonstrated, for the first time, by the monolithic integration of a vertical cavity lasers with depleted optical thyristor structure, which have not only a low threshold current with 0.65 mA. but also a high on/off contrast ratio more than 50 dB. By simple operating technique with changing a reference switching voltage, this single device operates as two logic functions, optical logic AND and OR. The thyristor laser fabricated using the oxidation process achieved a high optical output power efficiency and a high sensitivity to the optical input light.

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광 로직 게이트 구현을 위한 차동구조 Vertical Cavity Laser - Depleted Optical Thyristor에 관한 연구 (Differential switching operation of vertical cavity laser with depleted optical thyristor for optical logic gates)

  • 최운경;김두근;최영완
    • 대한전자공학회논문지SD
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    • 제44권7호통권361호
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    • pp.24-30
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    • 2007
  • 본 연구에서는 광 논리 및 광 스위칭 시스템에 응용할 수 있는 수직 구조 레이저 - 완전 공핍 광 싸이리스터 (vertical cavity laser - depleted optical thyristor, VCL-DOT)를 제작하고, 본 연구실에서 제안한 차동 스위칭 방법을 이용하여 광 로직(AND, OR, NAND, NOR, INVERT) 함수를 구현하였고, 그 특성을 측정, 분석하였다. 제작한 VCL-DOT는 0.65 mA의 낮은 레이징 문턱 전류, 0.38 mW/mA의 높은 slope efficiency, 그리고 낮은 입력 광 파워에도 높은 민감도를 보인다. 차동 소자타입의 광 싸이리스터를 이용하면 복잡한 전기 회로를 이용하지 않고도, 집적화된 단일 소자에서 간단한 기준 광입력 시호의 파워를 제어함으로써 다양한 광 로직 게이트를 구현할 수 있다는 장점을 갖는다.

회로면적에 효율적인 3 GHz CMOS LNA설계 (Size-Efficient 3 GHz CMOS LNA)

  • 전희석;윤여남;송익현;신형철
    • 대한전자공학회논문지SD
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    • 제44권10호
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    • pp.33-37
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    • 2007
  • 본 논문에서는 vertical shunt symmetric inductor를 이용하여 CMOS LNA의 설계에 있어서 회로의 면적을 줄이는 설계기술 및 구현에 관한 내용을 제시하고자 한다. 본 연구에 있어서 vertical shunt symmetric inductor는 LNA의 입력단과 출력단을 3GHz로 정합하기 위해서 사용되었다. 이렇게 구현된 보다 면적에 있어서 효율적인 증폭기를 0.18um digital logic공정으로 구현되었다. 본 논문에서는 일반적으로 LNA에서 사용하고 있는 inductor를 이용하는 경우와, vertical shunt symmetric inductor를 이용하여 LNA를 설계하는 경우에 대한 부분을 비교하였고, 최종적으로 면적에 효율적인 회로설계 기술을 제시하고자 한다.

방전 논리게이트 플라즈마 디스플레이 패널의 논리게이트 방전특성 (Discharge Characteristics of Logic Gate for Discharge Logic Gate Plasma Display Panel)

  • 염정덕
    • 조명전기설비학회논문지
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    • 제19권6호
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    • pp.9-15
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    • 2005
  • 본 연구는 새로 고안된 부정-논리곱 논리기능을 가지는 방전 논리 게이트 플라즈마 디스플레이 패널의 논리 게이트 방전특성을 해석한 것이다. 이 방전 논리 게이트는 방전 경로에 따른 전극사이의 전압을 제어하여 논리 출력을 유도한다. 실험결과 논리 게이트의 방전특성은 두 수직전극에 인가되는 전압들의 상호관계에 영향을 받는다는 것을 알았다. 그리고 대화면 PDP에의 적용 가능성을 검토하기 위하여 전극의 선저항에 의한 방전특성을 평가한 결과, 두 수직전극들의 선저항에 의한 전압강하가 논리 게이트의 방전에 미치는 영향은 미미한 것으로 추론되었다. 실험을 통해 방전 논리 게이트를 구성하는 각 전극들의 펄스전압과 전류제한저항의 최적 값들을 구하였으며 49[V]의 최대동작마진을 얻었다.

Optically Programmable Gate Array 구현을 위한 수직 공진형 완전공핍 광싸이리스터 (Design of Monolithically Integrated Vertical Cavity Laser with Depleted Optical Thyristor for Optically Programmable Gate Array)

  • 최운경;김도균;최영완
    • 전기학회논문지
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    • 제58권8호
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    • pp.1580-1584
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    • 2009
  • We have theoretically analyzed the monolithic integration of vertical cavity lasers with depleted optical thyristor (VCL-DOT) structure and experimentally demonstrated optical logic gates such as AND-gate, OR-gate, and INVERTER implemented by VCL-DOT for an optical programmable gate array. The optical AND and OR gates have been realized by changing a input bias of the single VCL-DOTs and all kinds of optical logic functions are also implemented by adjusting an intensity of the reference input beams into the differential VCL-DOTs. To achieve the high sensitivity, high slope efficiency and low threshold current, a small active region of lasing part and a wide detecting area are simultaneously designed by using a selective oxidation process. The fabricated devices clearly show nonlinear s-shaped current-voltage characteristics and lasing characteristics of a low threshold current with 0.65 mA and output spectrum at 854 nm.

병합트랜지스터를 이용한 고속, 고집적 ISL의 설계 (Design of a high speed and high intergrated ISL(Intergrated Schottky Logic) using a merged transistor)

  • 장창덕;이용재
    • 한국정보통신학회:학술대회논문집
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    • 한국해양정보통신학회 1999년도 춘계종합학술대회
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    • pp.415-419
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    • 1999
  • Many bipolar logic circuit of conventional occurred problem of speed delay according to deep saturation state of vertical NPN Transistor. In order to remove minority carries of the base region at changing signal in conventional bipolar logic circuit, we made transistor which is composed of NPN transistor shortened buried layer under the Base region, PNP transistor which is merged in base, epi layer and substrate. Also the Ring-Oscillator for measuring transmission time-delay per gate was designed as well. The structure of Gate consists of the vertical NPN Transistor, substrate and Merged PNP Transistor. In the result, we fount that tarriers which are coming into intrinsic Base from Emitter and the portion of edge are relatively a lot, so those make Base currents a lot and Gain is low with a few of collector currents because of cutting the buried layer of collector of conventional junction area. Merged PNP Transistor's currents are low because Base width is wide and the difference of Emitter's density and Base's density is small. we get amplitude of logic voltage of 200mv, the minimum of transmission delay-time of 211nS, and the minimum of transmission delay-time per gate of 7.26nS in AC characteristic output of Ring-Oscillator connected Gate.

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Townscape in a High-rise: Imageability and Accessibility of Vertical Malls in Hong Kong

  • Tan, Zheng
    • 국제초고층학회논문집
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    • 제4권2호
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    • pp.143-152
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    • 2015
  • The increasing integration of public space and consumerism in Hong Kong has yielded new urban forms. The emergent vertical malls in Hong Kong and other East Asian metropolises have overturned the existing vertical order of the city. This vertical order is determined by the level of accessibility, but is being challenged by widely adopted vertical circulation technology. Inspired by Fredric Jameson's and Rem Koolhaas' reflections on the cultural significance of vertical transportation, this article examines the conflict between market logic and urban design requirements in the vertical interior spaces. "Departmentalization," as the current programming formula for vertical malls, can be further optimized by critically applying urban design doctrines such as Kevin Lynch's five elements of city image. It concludes with a statement that the knowledge base of vertical urbanism should be open to a set of new terminology informed by a new technological environment.

집적화된 광 싸이리스터와 수직구조 레이저를 이용한 광 로직 AND/OR 게이트에 관한 연구 (Optical AND/OR gates based on monolithically integrated vertical cavity laser with depleted optical thyristor)

  • 최운경;김두근;김도균;최영완
    • 대한전자공학회논문지SD
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    • 제43권12호
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    • pp.40-46
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    • 2006
  • 본 연구에서는 GaAs/AlGaAs 구조의 수직 구조 레이저 - 완전 공핍 광 싸이리스터를 제작하여, 광 논리 및 광 스위칭 시스템에 응용할 수 있는, 광 AND- 와 OR- 게이트를 구현하였고, 그 특성을 측정, 분석하였다. 제작된 단일 소자 타입의 광 싸이리스터는 하나의 소자에서 간단한 기준 스위칭 전압의 변화만으로 광 AND 와 OR 게기트를 모두 구현할 수 있다는 장점을 갖는다. 활성층 위, 아래에 1/4 파장 거울층 구조를 채택하고, 선택적 산화공법을 이용하여 0.65 mA의 낮은 문턱전류 값을 얻었고, 50dB 이상의 높은 온/오프 대비를 보였으며, 높은 광 출력 효율과 입력 광 신호에 대한 높은 선택도를 얻을 수 있었다. 제작된 광 싸이리스터는 실험적으로 S자형의 전류-전압 특성곡선을 얻었고, 빛의 세기가 증가함에 따라 스위칭 전압이 5.20V에서 1.90V로 현저히 줄어드는 것을 확인하였다

GA-BASED PID AND FUZZY LOGIC CONTROL FOR ACTIVE VEHICLE SUSPENSION SYSTEM

  • Feng, J.-Z.;Li, J.;Yu, F.
    • International Journal of Automotive Technology
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    • 제4권4호
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    • pp.181-191
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    • 2003
  • Since the nonlinearity and uncertainties which inherently exist in vehicle system need to be considered in active suspension control law design, this paper proposes a new control strategy for active vehicle suspension systems by using a combined control scheme, i.e., respectively using a genetic algorithm (GA) based self-tuning PID controller and a fuzzy logic controller in two loops. In the control scheme, the PID controller is used to minimize vehicle body vertical acceleration, the fuzzy logic controller is to minimize pitch acceleration and meanwhile to attenuate vehicle body vertical acceleration further by tuning weighting factors. In order to improve the adaptability to the changes of plant parameters, based on the defined objectives, a genetic algorithm is introduced to tune the parameters of PID controller, the scaling factors, the gain values and the membership functions of fuzzy logic controller on-line. Taking a four degree-of-freedom nonlinear vehicle model as example, the proposed control scheme is applied and the simulations are carried out in different road disturbance input conditions. Simulation results show that the present control scheme is very effective in reducing peak values of vehicle body accelerations, especially within the most sensitive frequency range of human response, and in attenuating the excessive dynamic tire load to enhance road holding performance. The stability and adaptability are also showed even when the system is subject to severe road conditions, such as a pothole, an obstacle or a step input. Compared with conventional passive suspensions and the active vehicle suspension systems by using, e.g., linear fuzzy logic control, the combined PID and fuzzy control without parameters self-tuning, the new proposed control system with GA-based self-learning ability can improve vehicle ride comfort performance significantly and offer better system robustness.