Browse > Article

Size-Efficient 3 GHz CMOS LNA  

Jhon, Hee-Sauk (Seoul National Univ. Electrical Engineering, ISRC)
Yoon, Yeo-Nam (Seoul National Univ. Electrical Engineering, ISRC)
Song, Ick-Hyun (Seoul National Univ. Electrical Engineering, ISRC)
Shin, Hyung-Cheol (Seoul National Univ. Electrical Engineering, ISRC)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.44, no.10, 2007 , pp. 33-37 More about this Journal
Abstract
This paper presents the implementation technique to reduce circuit area occupation in designing Low Noise Amplifier (LNA) using vertical shunt symmetric inductor. We applied a vertical shunt symmetric inductor to match the input and output in 3 GHz CMOS LNA to reduce the circuit area. This size efficient amplifier has been designed in a $0.18\;{\mu}m$ digital logic CMOS process. In this paper, the case of conventional asymmetric inductor, and vertical shunt symmetrical inductor with a relatively higher number of turns have been compared in order to efficient a size efficient CMOS LNA design method while still retaining the circuit operation characteristics.
Keywords
CMOS; Low Noise Amplifier (LNA); vertical shunt inductor; thin metal CMOS process;
Citations & Related Records
연도 인용수 순위
  • Reference
1 K. Lee and B. Seo 'The impact of semiconductor technology scaling on CMOS RF and digital circuits for wireless application,' IEEE Trans. Electron Devices, vol. 52, pp. 1415-1422, July. 2005   DOI   ScienceOn
2 T. H. Lee, '5-GHz CMOS wireless LANs,' IEEE Trans. Microwave Theory Tech., vol. 50, pp. 268-280, Jan. 2002   DOI   ScienceOn
3 Shaeffer, D.K. and Lee, T.H.; 'A 1.5-V, 1.5-GHz CMOS low noise amplifier,' IEEE J. Solid-State Circuit, vol. 32, pp. 745-759, May. 1997   DOI   ScienceOn
4 Shaeffer, D.K. and T.H. Lee, The Design and Implementation of Low-Power CMOS Radio Receivers. Kluwer academic ,1999
5 T. Nguyen and S. Lee, 'CMOS Low Noise Amplifier Design Optimization Techniques,' IEEE Trans. Microwave Theory and Technique, vol. 52, pp. 1433-1442, May. 2004   DOI   ScienceOn
6 Sjoland, H., and A.A., 'A merged CMOS LNA and mixer for a WCDMA receiver,' IEEE J. Solid-State Circuit, vol. 38, pp. 1045-1050, June. 2003   DOI   ScienceOn
7 T. Kim, B. Kim, and K. Lee, 'Highly linear receiver front-end adopting MOSFET transconductance linearization by multiple gated transistors,' IEEE J. Solid-State Circuit, vol. 39, pp. 223-229, Jan. 2004   DOI   ScienceOn
8 F. Stubbe et al., 'A CMOS RF-receiver front-end for 1 GHz applications,' in VLSI Circuits Tech. Symp. Dig., 1998, pp. 80-83
9 J. Goo and Dutton, R.W., 'A noise optimization technique for integrated low-noise amplifiers,' IEEE J. Solid-State Circuit, vol. 37, pp. 994-1002, Aug. 2002   DOI   ScienceOn
10 Baki, R.A. and M.N.;, 'Distortion in RF CMOS short-channel low-noise amplifiers,' IEEE Trans. Microwave Theory and Technique, vol. 54, pp. 46-56, Jan. 2006   DOI   ScienceOn
11 C. P. Yue and S. S. Wong, 'A simple parameter extraction method of spiral on-chip inductors,' IEEE Trans. Electron Devices, vol. 52, pp. 1976-1981, Jan. 2005   DOI   ScienceOn
12 B. Razavi, 'CMOS technology characterization for analog and RF design,' IEEE J. Solid-State Circuits, vol. 34, pp. 268-276, Mar. 1999   DOI   ScienceOn
13 Razavi, RF microelectronics. Prentice Hall, 1998
14 Kang, M and Hyungcheol Shin 'Microwave inductors and capacitors in standard multilevel interconnect silicon technology,' IEEE Trans. Microwave Theory and Technique, vol. 44, pp. 100-104, Jan. 1996   DOI   ScienceOn
15 Burghartz, J.N. and Jenkins, K.A, 'Microwave inductors and capacitors in standard multilevel interconnect silicon technology,' IEEE Trans. Microwave Theory and Technique, vol. 44, pp. 100-104, Jan. 1996   DOI   ScienceOn