• 대한기계학회논문집A
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• 제39권3호
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• pp.291-301
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• 2015

제품 규정에는 제조사가 준수해야 하는 제품에 관한 다양한 지침 및 규제사항이 담겨 있다. 이 연구에서는 KS 표준을 활용하여 압력용기의 설계 결과를 검증하는 시스템 프레임워크와 구성 요소들을 제안한다. 그리고 기간 시스템으로부터 설계 템플릿 데이터를 생성하는 방법과 규정 지식베이스를 구축하는 방법을 제시한다. 마지막으로 압력용기 설계 검증 시스템을 구현하고 테스트 데이터를 활용한 실험을 통해 시스템 프레임워크를 검증한 결과를 논의한다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2001년도 하계종합학술대회 논문집(2)
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• pp.117-120
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• 2001

This paper presents a HW/SW co-design environments and its validation for development of virtual component on the 32-bit RISC core which is used in the design of Information-Appliance-On-a-Chip. For the experimental environment, we developed the cycle-accurate instruction set simulator based on SE3208 RISC core of ADChips. To verify the function of RISC core at the cycle level, we implemented the verification environment by grafting this simulator on the Seamless CVE which is a commercial co-verification environment.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2001년도 춘계종합학술대회
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• pp.345-348
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• 2001

본 논문은 디지털 비디오 방송 컴플라이언트 위성 수신칩에 대한 physical 설계 순서 및 검증에 대한 설계 기술에 관한 것으로서 각각의 설계 순서에 대한 고찰 및 문제점 그리고 물리적 레이아웃에 대한 검증 과정과 그 결과에 대하여 기술하였다.

• 한국원자력학회:학술대회논문집
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• 한국원자력학회 1998년도 춘계학술발표회논문집(1)
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• pp.335-340
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• 1998

In this paper a prototype of Requirement Tracking and Verification System(RTVS) for a Distributed Control System was implemented and tested. The RTVS is a software design and verification tool. The main functions required by the RTVS are managing, tracking and verification of the software requirements listed in the documentation of the DCS. The analysis of DCS software design procedures and inter(aces with documents were performed to define the user of the RTVS, and the design requirements for RTVS were developed.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 하계종합학술대회논문집
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• pp.815-818
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• 1998

Hardware formal verification involves the use of analytical techniques to prove that the implementation of a system confroms to the specification. The specification could be a set of properties that the system must have or it could be an alternative representation of the system behavior. We can represent our behavioral specification to be written in VHDL coding. In this paper, we proposed a new hardware design verification method. For theis method, we assumed that a verification pattern already exists and try to make an algorithm to find a place where a design error occurred. This method uses an hierarchical approach by making control flow graph(CFG) hierarchically. From the simulation, this method was turned out to be very effective that all the assumed design errors could be detected.

• 대한전자공학회논문지SD
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• 제44권6호
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• pp.83-88
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• 2007

본 논문에서는 유기발광다이오드 구동 IC의 기능을 검증하기 위하여 PLI(Programing Language Interface)를 이용한 검증방법을 제안한다. 기능 검증을 하기 위하여 HDL(Hardware Description Language) 시뮬레이터와 PLI, GUI(Graphic User Interface) 환경의 이미지 뷰어를 이용한다. 본 논문에서 제안하는 유기발광다이오드 구동 IC의 기능 검증 방법을 이용 할 경우 종래의 기능 검증 방법을 이용 할 때 보다 40배의 실행 시간 이득을 얻을 수 있다. 제안한 방법을 이용할 경우 디스플레이 구동 IC의 설계 단계에서 기능 검증을 효율적으로 할 수 있을 것이다.

• 대한기계학회논문집A
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• 제29권10호
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• pp.1353-1360
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• 2005

Injection-molded products serve a wide range of applications in our modem lives and their significance is ever increasing. However, difficulty of communication among related companies under the present system results in increase of lead time and decrease of production efficiency. The objective of this paper is the development of a web-based draft verification system in mold design processes. Although several commercial CAD systems offer draft verification functions, those systems are very expensive and inadequate to perform collaborative works. For collaborative work under the distributed environment, the proposed system uses native file transforming of CAD data into optimal format by using the ACIS kernel and InterOp. Functions of draft verification modules are constructed over the ActiveX control using the visual C++ and OpenGL. Therefore, collaborators related to the development of a new product are able to verify the draft and undercut over the Internet without commercial CAD systems. The system helps to reduce production cost, errors and lead-time to the market. Performance of the system is confirmed through various case studies.

• 한국철도학회:학술대회논문집
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• 한국철도학회 2008년도 춘계학술대회 논문집
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• pp.659-664
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• 2008

The Railroad Safety Act's regulation reads as follows. "The Minister of Construction and Transportation may qualify and authorize the product to guarantee performance and safety of parts, machine, and device used in Railway fields." Another regulation reads as follows."“The guidelines about targets, standards, and procedures of Quality and Authority in first provision are decided as Ministry of Construction and Transportation Decree." The software used in rail cars and facilities is considered as a railway product. Therefore, it is qualified and authorized for acquiring the safety of rail cars and facilities. The software businesses shall again a Quality and Authority for applying a software to the rail cars and facilities. This paper regulates some guidelines that are needed to develop a software. The procedures that a software developer performs are divided by plan, requirement, design, implementation, and maintenance. The procedures that a software verification person performs are classified by verification plan, requirement verification, design verification, implementation verification, testing verification, maintenance verification, and safety activity. The entire processes and detailed activities to develope and verify a software are described as new guidelines.

• 융합신호처리학회논문지
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• 제12권4호
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• pp.309-314
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• 2011

시스템의 복잡도가 증가함에 따라 상위수준 추상화에 기반한 시스템수준 설계 및 하드웨어의 기능적 검증을 위한 방법론의 중요성이 부각되고 있으며, Verilog HDL(Hardware Description Language)에 하드웨어 검증기능이 추가된 SystemVerilog를 이용하는 시스템수준의 기능적 검증방법이 각광받고 있다. SystemVerilog는 Verilog HDL의 확장된 형태로 하드웨어 설계언어와 검증언어의 특징을 모두 포함하나, 다중상속을 허용하지 않는다. 본 논문에서는 SystemVerilog 기반의 검증환경과 다중상속을 허용하는 SystemC 의 구성요소를 SystemVerilog DPI(Direct Programming Interface) 및 ModelSim macro를 이용해 결합한 다중상속이 가능한 검증환경을 구성한다. 다중상속이 허용된 검증환경 시스템은 특정부분을 수정 후 재실행으로 DUT(Design Under Test)의 기능 검증을 쉽게 수행할 수 있으며, OOP(Object Oriented programming) 기법을 이용한 코드의 재사용성이 높아 또 다른 DUT의 동작 검증에 재사용할 수 있다.

• 시스템엔지니어링워크숍
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• 통권1호
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• pp.9-14
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• 2003

The paper aims at presenting a systematic approach process and a method of requirement validation and system verification. Validation is applied during concept development to ensure conceptual validity, requirements validity, and design validity. Verification work is applied subsequent to the design work on test articles and early production items to produce evidence that the design solutions do, in fact, satisfy th requirements. In this paper, we present a requirements validation model and a system verification model. This models are applied to the development of TTX(Tilting Train Express)system with systems engineering tool, CORE.