• Proceedings of the KIEE Conference
• /
• 1992.07b
• /
• pp.1108-1113
• /
• 1992

In this paper, the high frequency twin resonant inverter using MOSFET is presented. The output control is excellent and the EMI noise is reduced, because the output appear as the vector sum of current in each unit inverter. The output voltage and the output current of the inverter are controlled by PLL. In this paper, the principle of the twin resonant method is described. And computer simulations and experimental results are shown.

• IE interfaces
• /
• v.24 no.2
• /
• pp.151-155
• /
• 2011

In this study, we propose a signomial classification method with ₀-regularization (₀-)which seeks a sparse signomial function by solving a mixed-integer program to minimize the weighted sum of the ₀-norm of the coefficient vector of the resulting function and the $L_1$-norm of loss caused by the function. $SC_0$ gives an explicit description of the resulting function with a small number of terms in the original input space, which can be used for prediction purposes as well as interpretation purposes. We present a practical implementation of $SC_0$ based on the mixed-integer programming and the column generation procedure previously proposed for the signomial classification method with $SL_1$-regularization. Computational study shows that $SC_0$ gives competitive performance compared to other widely used learning methods for classification.

• Proceedings of the Korean Operations and Management Science Society Conference
• /
• 1996.04a
• /
• pp.11-14
• /
• 1996

Performance of the group cumulative sum(CUSUM) control scheme using multiple univariate CUSUM charts is more sensitive to the change of quality control(QC) characteristics than the control chart scheme based on the Hotelling statistics. We examine three group charts for multivariate normal data sets simulated with various correlation structures and shift directions in the mean vector. These group schemes apply the orginal measurement vectors, the scaled residual vectors from the regression of each variable on all others and the principal component vectors respectively to calculating the CUSUM statistics. They are also compared to the multivariate QC charts based on the Hotelling statistic by estimating average run lengths, coefficients of variation of run length and ranks in signaling order. On the basis of simulation results, we suggest a control chart scheme appropriate for specific quality control environment.

• Structural Engineering and Mechanics
• /
• v.62 no.5
• /
• pp.537-550
• /
• 2017

Structural sizing is a rewarding task due to its non-convex constrained nature in the design space. In order to provide both global exploration and proper search refinement, a hybrid method is developed here based on outstanding features of Evolutionary Computing and Teaching-Learning-Based Optimization. The new method introduces an observer phase for memory exploitation in addition to vector-sum movements in the original teacher and learner phases. Proper integer coding is suited and applied for structural size optimization together with a fly-to-boundary technique and an elitism strategy. Performance of the proposed method is further evaluated treating a number of truss examples compared with teaching-learning-based optimization. The results show enhanced capability of the method in efficient and stable convergence toward the optimum and effective capturing of high quality solutions in discrete structural sizing problems.

• The Transactions of the Korean Institute of Electrical Engineers A
• /
• v.51 no.9
• /
• pp.460-466
• /
• 2002

A reliable fault phase selection algorithm plays a very important role in transmission line protection, Particularly in Extra High Voltage (EHV) networks. The conventional fault phase selection algorithm used the phase difference between positive and negative sequence current excluding load current. But, it is difficult to pick out only fault current since we can not know when a fault occurs and select the fault phase in weak-infeed conditions that dominate zero-sequence current in phase current. The proposed algorithm can select the accurately fault phase using the sum of unit vectors which are calculated by positive-sequence voltage and negative-sequence voltage.

• Journal of the Korean Institute of Telematics and Electronics B
• /
• v.32B no.1
• /
• pp.96-102
• /
• 1995

This paper presents the VHSIC Hardware Description Language(VHDL) implementation of the Fixed Point Covariance Lattice(FLAT) algorithm for an Linear Predictive Coding(LPC) analysis and its related algorithms, such as the forth order high pass Infinite Impulse Response(IIR) filter, covariance matrix calculation, and Spectral Smoothing Technique(SST) in the Vector Sum Exited Linear Predictive(VSELP) speech coder that has been Selected as the standard speech coder for the North America and Japanese digital cellular. Existing Digital Signal Processor(DSP) chips used in digital cellular phones are derived from general purpose DSP chips, and thus, these DSP chips may not be optimal and effective architectures are to be designed for the above mentioned algorithms. Then we implemented the VHDL code based on the C code, Finally, we verified that VHDL results are the same as C code results for real speech data. The implemented VHDL code can be used for performing logic synthesis and for designing an LPC Application Specific Integrated Circuit(ASOC) chip and DsP chips. We first developed the C language code to investigate the correctness of algorithms and to compare C code results with VHDL code results block by block.

• Proceedings of the Korean Society of Precision Engineering Conference
• /
• 2001.04a
• /
• pp.848-853
• /
• 2001

Electrostatic actuation was adopted for ease of fabrication. We proposed a new driving scheme that uses the vector sum of force generated by comb-finger and by parallel plate. The moving and fixed electrodes are arranged to maximize the driving force. In this paper, an electrostatic field analysis is performed by Maxwell analysis tool for micro actuators. From the analysis, a comb-parallel type micro-actuator with 4${\mu}{\textrm}{m}$ width, 6${\mu}{\textrm}{m}$ overlap and 45${\mu}{\textrm}{m}$ height could be designed. In order to compare the new type of actuator with the conventional comb type of actuator, we arranged that both types have the same area and the same number of actuators. To make a high aspect ratio structure, we are developing fabrication process using SU-8 and electro-plating.

• MALSORI
• /
• no.53
• /
• pp.103-118
• /
• 2005

The performance of speech recognition system is degraded by mismatch between training and test environments. Recently, Stereo-based Piecewise LInear Compensation for Environments (SPLICE) was introduced to overcome environmental mismatch using stereo data. In this paper, we propose several methods to improve the conventional SPLICE and evaluate them in the Aurora2 task. We generalize SPLICE to compensate for covariance matrix as well as mean vector in the feature space, and thereby yielding the error rate reduction of 48.93%. We also employ the weighted sum of correction vectors using posterior probabilities of all Gaussians, and the error rate reduction of 48.62% is achieved. With the combination of the above two methods, the error rate is reduced by 49.61% from the Aurora2 baseline system.

• Proceedings of the IEEK Conference
• /
• 1999.06a
• /
• pp.601-604
• /
• 1999

We propose a new hierarchical motion estimator architecture that supports the advanced prediction mode of recent low bit-rate video coders such as H.263 and MPEG-4. In the proposed VLSI architecture, a basic searching unit (BSU) is commonly utilized for all hierarchical levels to make a systematic and small sized motion estimator. Since the memory bank of the proposed architecture provides scheduled data flow for calculating 8$\times$8 block-based sum of absolute difference (SAD), both a macroblock-based motion vector (MV) and four block-based MVs are simultaneously obtained for each macroblock in the advanced prediction mode. The proposed motion estimator gives similar coding performance compared with full search block matching algorithm (FSBMA) while achieving small size and satisfying the advanced prediction mode.

• Journal of the Korean Institute of Telematics and Electronics B
• /
• v.31B no.10
• /
• pp.130-139
• /
• 1994

Video compression algorithms are based on removing spatial and/or temproal redundancy inherent in image sequences by predictive(DPCM) encoding, transform encoding, or a combination of predictive and transform encoding. In this paper, each 8$\times$8 DCT coefficient of DFD(displaced frame difference) is adaptively quantized by one of the four quantizers depending on total distortion level, which is determined by characteristics of HVS(human visual system) and buffer status. Therefore, the number of possible quantizer selection vectors(patterns) is 4$^{64}$. If this vectors are coded, toomany bits are required. Thus, the quantizer selection vectors are limited to 2048 for Y and 512 for each U, V by the proposed method using SWAD(sum of weighted absolute difference) for discriminating vectors. The computer simulation results, using the codebook vectors which are made by the proposed method, show that the subjective and objective image quality (PSNR) are goor with the limited bit allocation. (17Mbps)