• The Transactions of the Korean Institute of Power Electronics
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• v.4 no.1
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• pp.26-34
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• 1999

According to increase of nonlinear power electronics equipment, active power filters have been researched and developed for many years to compensate harmonic disturbances and reactive power. However the commercial of active power filter is being proceeded slowly, because the cost of active power filter compared to the passive filter for harmonic and reactive power compensation is expensive. Especially, the use of DSP (Digital Signal Processing) chip, which is frequently used to control 3-phase active power filter, is a factor of increasing the cost of active power filters. On the other hand, the use of only analog controller makes the controller's circuits much more complicate and depreciates the flexibilities of controller. In this paper, a controller with low cost for 5[kVA] 3-phase active power filter system is designed. To reduce the expense of active filter system, the presented controller is composed of digital control part using Intel 80C196KC $\mu$P and analog control part using hysteresis controller for current control. Characteristic analysis of designed controller for active filter system is performed by computer simulation and compensating characteristics of the designed controller are verified by experiment.tegy can apply to the vector control, leading to better output torque capability in the ac motor drive system. This strategy is that in the overmodulation range, the d-axis output current is given a priority to regulate the flux well, instead the q-axis output curent is sacrificed. Therefore, the vector control even in the overmodulation PWM operation can be achieved well. For this purpose, the d-axis output voltage of a current controller to control the flux is conserved. the q-axis output voltage to control the torque is controlled to place the reference voltage vector on the hexagon boundary in case of the overmodulation. The validity of the proposed overall scheme is confirmed by simulation and experiments for a 22[kW] induction motor drive system.

• KIPS Transactions on Computer and Communication Systems
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• v.11 no.6
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• pp.167-174
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• 2022

PIPO lightweight block ciphers were announced in ICISC'20. In this paper, a single-block optimization implementation and parallel optimization implementation of PIPO lightweight block cipher ECB, CBC, and CTR operation modes are performed on a 32-bit RISC-V processor. A single block implementation proposes an efficient 8-bit unit of Rlayer function implementation on a 32-bit register. In a parallel implementation, internal alignment of registers for parallel implementation is performed, and a method for four different blocks to perform Rlayer function operations on one register is described. In addition, since it is difficult to apply the parallel implementation technique to the encryption process in the parallel implementation of the CBC operation mode, it is proposed to apply the parallel implementation technique in the decryption process. In parallel implementation of the CTR operation mode, an extended initialization vector is used to propose a register internal alignment omission technique. This paper shows that the parallel implementation technique is applicable to several block cipher operation modes. As a result, it is confirmed that the performance improvement is 1.7 times in a single-block implementation and 1.89 times in a parallel implementation compared to the performance of the existing research implementation that includes the key schedule process in the ECB operation mode.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.9C
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• pp.895-904
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• 2007

This paper proposes a robust sub-optimal smart antenna in Code Division Multiple Access (CDMA) basestation. It makes use of the property of the Least Mean Square (LMS) algorithm and the Conjugate Gradient Method (CGM) algorithm for beamforming processes. The weight update takes place at symbol level which follows the PN correlators of receiver module under the assumption that the post correlation desired signal power is far larger than the power of each of the interfering signals. The proposed algorithm is simple and has as low computational load as five times of the number of antenna elements(O(5N)) as a whole per each snapshot. The output Signal to Interference plus Noise Ratio (SINR) of the proposed smart antenna system when the weight vector reaches the steady state has been examined. It has been observed in computer simulations that proposed beamforming algorithm improves the SINR significantly compared to the single antenna case. The convergence property of the weight vector has also been investigated to show that the proposed hybrid algorithm performs better than CGM and LMS during the initial stage of the weight update iteration. The Bit Error Rate (BER) characteristics of the proposed array has also been shown as the processor input Signal to Noise Ratio (SNR) varies.

• Journal of the Korea Society of Computer and Information
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• v.17 no.4
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• pp.1-9
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• 2012

As we are turnning into the aged society, accidents by falling down are increasing in the aged people's group. In this paper, we design the system with the 3-Axis acceleration sensor which is composed by a single chip. The body activity signal is measured with the signal detector and RF communicator in this proposed system and the and falling by the entering signal pattern analysis with 3-Axis acceleration sensor. For the RF communication, we are using nRF24L01p and 8bits ATmega uC for the processor. The error of energy expenditure estimation between motor driven treadmill and proposed a body activity module was 7.8% respectively. Human activities and falling is monitored according to analyze and judge the critical value of the Signal Vector. as falled down if they don't turn off the alarm after specific period and the aged person's after falling down activities are their position and more.

• Journal of the Korean Society of Marine Environment & Safety
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• v.28 no.1
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• pp.184-192
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• 2022

Valve internal leakage is caused by damage to the internal parts of the valve, resulting in accidents and shutdowns of the piping system. This study investigated the possibility of a real-time leak detection method using the acoustic emission (AE) signal generated from the piping system during the internal leakage of a butterfly valve. Datasets of raw time-domain AE signals were collected and postprocessed for each operation mode of the valve in a systematic manner to develop a data-driven model for the detection and classification of internal leakage, by applying machine learning algorithms. The aim of this study was to determine whether it is possible to treat leak detection as a classification problem by applying two classification algorithms: support vector machine (SVM) and convolutional neural network (CNN). The results showed different performances for the algorithms and datasets used. The SVM-based binary classification models, based on feature extraction of data, achieved an overall accuracy of 83% to 90%, while in the case of a multiple classification model, the accuracy was reduced to 66%. By contrast, the CNN-based classification model achieved an accuracy of 99.85%, which is superior to those of any other models based on the SVM algorithm. The results revealed that the SVM classification model requires effective feature extraction of the AE signals to improve the accuracy of multi-class classification. Moreover, the CNN-based classification can be a promising approach to detect both leakage and valve opening as long as the performance of the processor does not degrade.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.4B
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• pp.771-782
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• 2000

In this paper, an H.263 video codec is implemented by adopting the concept of hardware and software co-design. Each module of the codec is investigated to find which approach between hardware and software is better to achieve real-time processing speed as well as flexibility. The hardware portion includes motion-related engines, such as motion estimation and compensation, and a memory control part. The remaining portion of theH.263 video codec is implemented in software using a RISC processor. This paper also introduces efficient design methods for hardware and software modules. In hardware, an area-efficient architecture for the motion estimator of a multi-resolution block matching algorithm using multiple candidates and spatial correlation in motion vector fields (MRMCS), is suggested to reduce the chip size. Software optimization techniques are also explored by using the statistics of transformed coefficients and the minimum sum of absolute difference (SAD)obtained from the motion estimator.

• Journal of Electrical Engineering and Technology
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• v.10 no.4
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• pp.1527-1539
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• 2015

In this paper the hardware implementation of the direct torque control based on the fuzzy logic technique of induction motor on the Field-Programmable Gate Array (FPGA) is presented. Due to its complexity, the fuzzy logic technique implemented on a digital system like the DSP (Digital Signal Processor) and microcontroller is characterized by a calculating delay. This delay is due to the processing speed which depends on the system complexity. The limitation of these solutions is inevitable. To solve this problem, an alternative digital solution is used, based on the FPGA, which is characterized by a fast processing speed, to take the advantage of the performances of the fuzzy logic technique in spite of its complex computation. The Conventional Direct Torque Control (CDTC) of the induction machine faces problems, like the high stator flux, electromagnetic torque ripples, and stator current distortions. To overcome the CDTC problems many methods are used such as the space vector modulation which is sensitive to the parameters variations of the machine, the increase in the switches inverter number which increases the cost of the inverter, and the artificial intelligence. In this paper an intelligent technique based on the fuzzy logic is used because it is allows controlling the systems without knowing the mathematical model. Also, we use a new method based on the Xilinx system generator for the hardware implementation of Direct Torque Fuzzy Control (DTFC) on the FPGA. The simulation results of the DTFC are compared to those of the CDTC. The comparison results illustrate the reduction in the torque and stator flux ripples of the DTFC and show the Xilinx Virtex V FPGA performances in terms of execution time.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.05a
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• pp.827-830
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• 2011

In this paper, a wind speed & direction module and the DSP(Digital Signal Processor) sensor interface circuit board are proposed. This DSP system accepts and process the informations from a wind speed & direction module, the atmospheric pressure sensor, the ambient air temperature sensor and transfers it to the PC monitering system. Especially, a wind speed & direction module and a DSP hardware are directly designed and applied. A wind speed & direction module have a construction that it have four film type RTD(Resistive Temperature Detectors) or film type Piezo sensors adhered around the circular metal body for obtaining vector informations about wind. By this structure, the module is enabled precise measurement having a robustness about vibration, humidity, corrosion. A sensor signal processing circuit is using TMS320F2812 TI(Texas Instrument) Corporation high speed DSP.

• Journal of the Korean Society of Surveying, Geodesy, Photogrammetry and Cartography
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• v.27 no.3
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• pp.401-408
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• 2009

A study for 3D-reconstruction and providing the geospatial information is in progress to many fields recently. For efficient providing the geospatial information, the present information has to be updated and be revised and then the latest geospatial information needs to be acquired economically. Especially, LiDAR system utilized in many study has a advantage to collect the 3D spacial data easily and densely that is possible to supply to the geospatial information. The 3D data of LiDAR is very suitable as a data for presenting 3D space, but in case of using the data without converting, the high performance processor is needed for presenting 2D forms from point data composed by 3D data. In comparison, basically the raster data structure of 2D form is more efficient than vector structure in cheap devices because of a simple structure and process speed. The purpose of this study, in case of supplying LiDAR data as 3D data, present the method that reconstructs to 2D raster data and convert to compression data applied by th tree construction in detail.

• Journal of Korean Society for Geospatial Information Science
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• v.19 no.3
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• pp.41-47
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• 2011

Processing of the raw LiDAR data requires the high-end processor, because data form is a vector. In contrast, if LiDAR data is converted into a regular grid pattern by filltering, that has advantage of being in a low-cost equipment, because of the simple structure and faster processing speed. Especially, by using grid data classification, such as Quadtree, some of trees and cars are removed, so it has advantage of modeling. Therefore, this study presents the algorithm for automatic extraction of ground points using Quadtree and refion growing method from LiDAR data. In addition, Error analysis was performed based on the 1:5000 digital map of sample area to analyze the classification of ground points. In a result, the ground classification accuracy is over 98%. So it has the advantage of extracting the ground points. In addition, non-ground points, such as cars and tree, are effectively removed as using Quadtree and region growing method.