• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.1A
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• pp.114-121
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• 2000

The problem of an input-buffered switch is the HOL(head-of-line) blocking which limits the maximum throughput but it is easy to implement in hardware. However, HOL blocking can be eliminated using aVOQ(virtual-output-queueing) technique. 0 this paper, we propose a new cell-scheduling algorithm for aninput-buffered ATM switch. The proposed algorithm, called PPIM(Probabilistic Parallel Iterative Matching), imposesa weight to every request based on the reserved bandwidth. It is shown that the input-buffered ATM switch withthe proposed PPIM algorithm not only provides high throughput and low delay but it also reduces the jitter,compared with the existing WPIM(Weighted PIM).

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.7
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• pp.1393-1398
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• 2003

In this paper, we propose a new switch architecture with one schedule at k-time slots, which k means the allocated time slots for each schedule. A conventional switch system uses a single time slot per each schedule but the proposed switch system uses multiple time slots per each schedule. Both the conventional switch md the proposed switch have same throughput but our switch system occupies multiple cell time slots per each schedule and hence can be implemented in scheduler of simple circuitry compared to the conventional switch. The proposed scheduling method for switch system will be applicable in switch system with high-speed data link rate.