• Journal of the Korean Crystal Growth and Crystal Technology
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• v.27 no.1
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• pp.1-8
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• 2017

Catalytic synthesis and properties of ${\beta}-Ga_2O_3$ nanowires grown by metal organic chemical vapor deposition are reported. Au, Ni and Cu catalysts were suitable for the growth of $Ga_2O_3$ nanowires under our experimental conditions. The $Ga_2O_3$ nanowires grown by using Au, Ni and Cu catalysts showed different growth rates and morphologies in each case. We found the $Ga_2O_3$ nanowires were grown by the Vapor-Solid (VS) process when Ni was used as a catalyst while the Vapor-Liquid-Solid (VLS) was a dominant process in case of Au and Cu catalysts. Also, we found nanowires showed different optical properties depend on catalytic metals. On the other hand, for the cases of Ti, Sn and Ag catalysts, nanowires could not be obtained under the same condition of Au, Cu and Ni catalytic synthesis. We found that these results are related to the different characteristics of each catalyst, such as, melting points and phase diagrams with gallium metal.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.289-289
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• 2013

While there are plenty of studies on synthesizing semiconducting germanium nanowires (Ge NWs) by vapor-liquid-solid (VLS) process, it is difficult to inject dopants into them with uniform dopants distribution due to vapor-solid (VS) deposition. In particular, as precursors and dopants such as germane ($GeH_4$), phosphine ($PH_3$) or diborane ($B_2H_6$) incorporate through sidewall of nanowire, it is hard to obtain the structural and electrical uniformity of Ge NWs. Moreover, the drastic tapered structure of Ge NWs is observed when it is synthesized at high temperature over $400^{\circ}C$ because of excessive VS deposition. In 2006, Emanuel Tutuc et al. demonstrated Ge NW pn junction using p-type shell as depleted layer. However, it could not be prevented from undesirable VS deposition and it still kept the tapered structures of Ge NWs as a result. Herein, we adopt $C_2H_2$ gas in order to passivate Ge NWs with carbon sheath, which makes the entire Ge NWs uniform at even higher temperature over $450^{\circ}C$. We can also synthesize non-tapered and uniformly doped Ge NWs, restricting incorporation of excess germanium on the surface. The Ge NWs with carbon sheath are grown via VLS process on a $Si/SiO_2$ substrate coated 2 nm Au film. Thin Au film is thermally evaporated on a $Si/SiO_2$ substrate. The NW is grown flowing $GeH_4$, HCl, $C_2H_2$ and PH3 for n-type, $B_2H_6$ for p-type at a total pressure of 15 Torr and temperatures of $480{\sim}500^{\circ}C$. Scanning electron microscopy (SEM) reveals clear surface of the Ge NWs synthesized at $500^{\circ}C$. Raman spectroscopy peaked at about ~300 $cm^{-1}$ indicates it is comprised of single crystalline germanium in the core of Ge NWs and it is proved to be covered by thin amorphous carbon by two peaks of 1330 $cm^{-1}$ (D-band) and 1590 $cm^{-1}$ (G-band). Furthermore, the electrical performances of Ge NWs doped with boron and phosphorus are measured by field effect transistor (FET) and they shows typical curves of p-type and n-type FET. It is expected to have general potentials for development of logic devices and solar cells using p-type and n-type Ge NWs with carbon sheath.

• English Language & Literature Teaching
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• v.17 no.3
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• pp.27-56
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• 2011

The analysis on the use of lexical discovery and consolidation strategies that have been researched within the area of vocabulary learning strategies (VLS) have not sufficiently drawn the interest of EFL practitioners with regard to vocational high school learners. The results, however, are expected to have implications for the design of vocabulary tasks and instructional materials for EFL learners. The present study investigates EFL vocational high school learners' use of lexical discovery and consolidation strategies with questionnaires, where the use of the learners' lexical discovery strategies were further validated with the think-aloud methodology by asking samples of proficient and less proficient learners to report on their reading process while reading L2 texts that had not been exposed to the learners. The results indicated that there were significant differences between the two groups of learners in the employment of 11 of the strategies which were in the categories of determination, social, memory, and metacognitive strategies, but not for cognitive strategies. The pattern of strategies indicated that different lexical discovery and consolidation strategies were employed relatively more by one proficiency group than another. The study suggests some implications for how strategy-based instruction can be implemented in EFL classrooms.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.23-23
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• 2009

Recently, the nanowire configuration of GST showed nanosecond-level phase switch at very low power dissipation, suggesting that the nanowires could be ideal for data storage devices. In spite of many advantages of IST materials, their feasibility in both thin films and nanowires for electronic memories has not been extensively investigated. The synthesis of the chalcogenide nanowires was mainly preformed via a vapor transport process such as vapor-liquid-solid (VLS) growth at a high temperature. However, in this study, IST nanowires as well as thin films were prepared at a low temperature (${\sim}250^{\circ}C$) by metal organic chemical vapor deposition(MOCVD) method, which is possible for large area deposition. The IST films and/or nanowires were selectively grown by a control of working pressure at a constant growth temperature by MOCVD. In-Sb-Te NWs will be good candidate materials for high density PRAM applications. And MOCVD system is powerful for applying ultra scale integration cell.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.580-580
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• 2012

Heterostructures has unique and important properties, which may be helpful for finding many potential applications in the field of electronic, thermoelectric, and optoelectronic devices. We synthesized CdTe/Te core-shell heterostructures by vapor-solid process at low temperatures using a quartz tube furnace. Two step vapor-solid processes were employed. First, various tellurium structures such as nanowires, nanorods, nanoneedles, microtubes and microrods were synthesized under various deposition conditions. These tellurium nanostructures were then used as substrates in the second step to synthesize the CdTe/Te core-shell heterostructures. Using this method, various sizes, shapes and types of CdTe/Te core-shell structures were fabricated under a range of conditions. These structures were analysed by scanning electron microscopy, high resolution transmission electron microscopy, and energy dispersive x-ray spectroscopy. The vapor phase process at low temperatures appears to be an efficient method for producing a variety of Cd/Te hetero-nanostructures. In addition, the hetero-nanostructures can be tailored to the needs of specific applications by deliberately controlling the synthetic parameters.

• Journal of the Korean Vacuum Society
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• v.22 no.4
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• pp.204-210
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• 2013

In order to improve osseointegration for biomedical implants, it is crucial to understand the interactions between nanostructured surfaces and cells. In this study, $TiO_2$ nanowires were prepared via Vapor-Liquid-Solid (VLS) process with Sn as a metal catalyst in the tube furnace. Nanowires were grown with $N_2$ heat treatment with their size controlled by the agglomeration of Sn layers in various thicknesses. MC3T3-E1 (pre-osteoblast) were cultured on the $TiO_2$ nanowires for a week. Preliminary results of the cell culture showed that the cells adhere well on the $TiO_2$ nanowires.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.440-440
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• 2009

Semiconductor nanowires offer exciting possibilities as components of solar cells and have already found applications as active elements in organic, dye-sensitized, quantum-dot sensitized, liquid-junction, and inorganic solid-state devices. Among many semiconductors, silicon is by far the dominant material used for worldwide photovoltaic energy conversion and solar cell manufacture. For silicon wire to be used for solar device, well aligned wire arrays need to be fabricated vertically or horizontally. Macroscopic silicon wire arrays suitable for photovoltaic applications have been commonly grown by the vapor-liquid-solid (VLS) process using metal catalysts such as Au, Ni, Pt, Cu. In the case, the impurity issues inside wire originated from metal catalyst are inevitable, leading to lowering the efficiency of solar cell. To escape from the problem, the wires of purity of wafer are the best for high efficiency of photovoltaic device. The fabrication of wire arrays by the electrochemical etching of silicon wafer with photolithography can solve the contamination of metal catalyst. In this presentation, we introduce silicon wire arrays by electrochemical etching method and then fabrication methods of radial p-n junction wire array solar cell and the various merits compared with conventional silicon solar cells.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.17 no.3
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• pp.91-94
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• 2007

Single-crystalline $SnO_2$ nanowires were successfully grown on Si(001) substrates via vapor-liquid-solid mechanism in a thermal chemical vapor deposition. Large quantity of $SnO_2$ nanowires were synthesized at temperature ranges of $950{\sim}1000^{\circ}C$ in Ar atmosphere. It was found that the grown $SnO_2$ nanowires are of a tetragonal rutile structure and single crystalline by diffraction and transmission electron microscopy measurements. Broad emission located at about 600 m from the grown nanowires was clearly observed in room temperature photoluminescence measurements, indicating that the emission band originated from defect level transition into $SnO_2$ nanowires.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.354-354
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• 2012

In this study, we report the vertically aligned ZnO nanowires by using different type of Ga-doped ZnO (GZO) thin films as seed layers to investigate how the underlying GZO film micro structure affects the distribution of ZnO nanowires. Arrays of highly ordered ZnO nanowires have been synthesized on GZO thin film seed layer prepared on p-Si substrates ($7-13{\Omega}cm$) with utilize of a pulsed laser deposition (PLD). With the vapor-liquid-solid (VLS) growth process, the ZnO nanowire synthesis carries out no metal catalyst and is cost-effective; furthermore, The GZO seed layer facilitates the uniform growth of well-aligned ZnO nanowires. The influence of the growth temperature and various thickness of GZO seed layer have been analyzed. Crystallinity of grown seed layer was studied by X-Ray diffraction (XRD); diameter and morphology of ZnO nanowires on seed layer were investigated by field emission scanning electron microscopy (FE-SEM). Our results suggest that the GZO seed layer with high c-axis orientation, good crystallinity, and less lattice mismatch is key parameters to optimize the growth of well-aligned ZnO nanowire arrays.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.97-97
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• 2011

산화아연 (ZnO)은 넓은 에너지 밴드갭 (~3.37 eV), 큰 엑시톤 결합 에너지 (~60 meV) 그리고 높은 전자 이동도 (bulk~300 $cm^2Vs^{-1}$, single nanowire~1000 $cm^2Vs^{-1}$)를 갖고 있어, 광전자 소자 및 반도체소자 응용에 매우 널리 사용되고 있다. 특히, 산화아연 나노로드(ZnO nanorod)는 1차원 나노구조로써 더욱 향상된 전자 이동도와 캐리어의 direct path way를 제공하여 차세대 광전자소자 및 태양광 소자의 응용에 대한 연구가 매우 활발하게 이루어지고 있다. 한편, 이러한 산화아연 나노로드를 성장시키기 위하여 VLS (vapor-liquid-solid), 졸-겔 공정(sol-gel process), 수열합성(hydrothermal synthesis), 전기증착(electrodeposition)등 다양한 방법이 보고되었지만, 이러한 산화아연 나노로드의 성장방법은 실제적인 소자응용을 위한 패터닝 형성에 대하여 제약을 받는 문제점이 있다. 이들 중에서 수열합성법과 전극증착법은 ZnO 또는 AZO (Al doped ZnO) seed 층 표면과 성장용액의 화학반응에 의해서 선택적으로 산화아연 나노로드를 성장시킬 수 있다. 이에 본 연구에서는, 광전자소자의 응용을 위한 간단한 패터닝 공정을 위해, 산화인듐주석(ITO) 박막이 증착된 유리기판(glass substrate)위에 수열합성법과 전극증착법을 이용하여 산화아연 나노로드를 선택적으로 성장시켰다. 실험을 위해, ITO glass 위에 RF magnetron 스퍼터를 사용하여 AZO seed 층을 metal shadow mask를 이용하여 패터닝을 형성한 후, 질산아연과 헥사메틸렌테트라아민으로 혼합된 용액에 $85^{\circ}C$ 온도를 유지하여, 패터닝이 형성된 샘플에 전압을 인가하여 성장시켰다. 나노구조 분석을 위해, 전계주사현미경을 이용하여 수열합성법과 전기증착법에 의한 패터닝된 산화아연 나노로드를 비교하여 관찰하였다.