• Title/Summary/Keyword: VIDEO ENCODER

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A PDWZ Encoder Using Code Conversion and Bit Interleaver (코드변환과 비트 인터리버를 이용한 화소영역 Wyner-Ziv 부호화 기법)

  • Kim, Jin-Soo;Kim, Jae-Gon;Seo, Kwang-Deok
    • Journal of Broadcast Engineering
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    • v.15 no.1
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    • pp.52-62
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    • 2010
  • Recently, DVC (Distributed Video Coding) is attracting a lot of research works since this enables us to implement a light-weight video encoder by distributing the high complex tasks such as motion estimation into the decoder side. In order to improve the coding efficiency of the DVC, the existing works have been focused on the efficient generation of side information (SI) or the virtual channel modeling which can describe the statistical channel noise well. But, in order to improve the overall performance, this paper proposes a new scheme that can be implemented with simple bit operations without introducing complex operation. That is, the performance of the proposed scheme is enhanced by using the fact that the Wyner-Ziv (WZ) frame and side information are highly correlated, and by reducing the effect of virtual channel noise which tends to be clustered in some regions. For this aim, this paper proposes an efficient pixel-domain WZ (PDWZ) CODEC which effectively exploits the statistical redundancy by using the code conversion and Gray code, and then reduces the channel noise by using the bit interleaver. Through computer simulations, it is shown that the proposed scheme can improve the performance up to 0.5 dB in objective visual quality.

Improved FGS Coding System Based on Sign-bit Reduction in Embedded Bit-plane Coding

  • Seo, Kwang-Deok;Davies, Robert J.
    • IEMEK Journal of Embedded Systems and Applications
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    • v.2 no.3
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    • pp.129-137
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    • 2007
  • MPEG-4 FGS is one of scalable video coding schemes specified In ISO/IEC 14496-2 Amendment 2, and particularly standardized as a scheme for providing fine granular quality and temporal scalabilities. In this paper, we propose a sign-bit reduction technique in embedded bit-plane coding to enhance the coding efficiency of MPEG-4 FGS system. The general structure of the FGS system for the proposed scheme is based on the standard MPEG-4 FGS system. The proposed FGS enhancement-layer encoder takes as input the difference between the original DCT coefficient and the decision level of the quantizer instead of the difference between the original DCT coefficient and its reconstruction level. By this approach, the sign information of the enhancement-layer DCT coefficients can be the same as that of the base-layer ones at the same frequency index in DCT domain. Thus, overhead bits required for coding a lot of sign information of the enhancement-layer DCT coefficients in embedded bit-plane coding can be removed from the generated bitstream. It is shown by simulations that the proposed FGS coding system provides better coding performance, compared to the MPEG-4 FGS system in terms of compression efficiency.

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Analysis of Power Saving Factor for a DVS Based Multimedia Processor (DVS 기반 멀티미디어 프로세서의 전력절감율 분석)

  • Kim Byoung-Il;Chang Tae-Gyu
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.42 no.1
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    • pp.95-100
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    • 2005
  • This paper proposes a DVS method which effectively reduces the power consumption of multimedia signal processor. Analytic derivations of effective range of its power saving factor are obtained with the assumption of a Gaussian distribution for the frame-based computational burden of the multimedia processor. A closed form equation of the power saving factor is derived in terms of the mean-standard deviation of the distribution. An MPEG-2 video decoder algorithm and AAC encoder algorithm are tested on ARM9 RISC processor for the experimental verification of the power saying of the proposed DVS approach. The experimental results with diverse MPEG-2 video and audio files show 50~30% power saving factor and show good agreement with those of the analytically derived values.

Study of parallelization methods for real-time HEVC encoder implementation (실시간 HEVC 인코더 구현을 위한 병렬화 기법에 관한 연구)

  • Ahn, Yongjo;Hwang, Taejin;Lee, Dongkyu;Kim, Sangmin;Oh, Seoung-Jun;Sim, Dong-Gyu
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2013.06a
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    • pp.119-122
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    • 2013
  • ITU-T VCEG 과 ISO/IEC MPEG 이 공동으로 구성한 JCT-VC (Joint Collaborative Team on Video Coding)이 표준화를 진행 중인 HEVC (High Efficiency Video Coding)은 H.264/AVC 대비 약 2 배의 압축효율을 갖는다. 하지만, 계층적 구조를 갖는 가변크기 블록의 사용과 재귀적 부호화 구조에 따른 인코더의 복잡도 증가는 개선해야 할 문제점으로 지적되고 있다. 본 논문에서는 현재 표준화가 진행 중인 HEVC 인코더의 실시간 구현을 위한 SIMD 명령어를 이용한 data-level 병렬화 기법, CPU 및 GPU 를 이용한 multi-threading 기법과 같은 다양한 병렬화 기법을 소개한다. 또한, 이러한 병렬화 기법들을 HEVC 인코더에 적용하기 위해 적합한 연산 및 기능 모듈에 대하여 소개한다. 본 연구를 통하여 HM (HEVC reference model)에 적용한 결과 $832{\times}480$ 영상의 경우 20-30fps 의 부호화 속도를 나타냈으며, $1920{\times}1080$ 영상의 경우 5-10fps 의 부호화 속도를 나타내었다.

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Fast Coding Mode Decision for H.264 Video Coding (H.264 동영상 압축을 위한 고속 부호화 모드 결정 방법)

  • 이제윤;전병우
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.41 no.6
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    • pp.165-173
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    • 2004
  • H.264 is the newest international video coding standard that provides high coding efficiency. A macroblock in H.264 has 7 different motion-compensation block sizes in the Inter mode, and several different prediction directions in the Intra mode. In order to achieve as highest coding efficiency as possible, H.264 reference model employs complex mode decision technique based on rate-distortion (RD) optimization which requires high computational complexity. In this paper, we propose two techniques -'early SKIP mode decision' and 'selective intra mode decision' - which can further reduce the computational complexity. Simulation results show that without considerable performance degradation, the proposed methods reduce encoding time by 30% on average and save the number of computing rate-distortion cost by 72%.

Parity Bits Request Estimation Using Motion Information Feedback for Fast Distributed Video Decoding (고속 분산 비디오 복호화를 위한 움직임 정보 피드백을 이용한 패리티 비트 요구량 예측 기법)

  • Kim, Man-jae;Choi, Haechul;Kim, Jin-soo
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2012.10a
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    • pp.107-108
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    • 2012
  • For low complexity encoder, the parity bit transmission through a feedback channel is an essential part of DVC. But feedback channel-based parity bit control is a major cause for the high decoding time latency. In this paper, we propose a fast distributed video decoding by parity bit request estimation using rate-distortion model. Through computer simulations, it is shown that the proposed method can achieve complexity reduction compared to other methods.

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Implementation of Infrared Thermal Image Processing System for Disaster Monitoring (재난 감시를 위한 적외선 열화상 처리 시스템의 구현)

  • Kim, Won-Ho;Kim, Dong-Keun
    • Journal of the Institute of Convergence Signal Processing
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    • v.11 no.1
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    • pp.9-12
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    • 2010
  • This paper presents design and implementation of infrared thermal image processing system based on the digital media processor for disaster monitoring. The digital thermal image processing board is designed and implemented by using commercial chips such as DM642 processor and video encoder, video decoder. The implemented functions for disaster monitoring are to analyze temperature distribution of a monitoring infrared thermal image and to detect disaster situation such as fire. For the input of infrared thermal image processing system, an infrared camera of type of the $320\;{\times}\;240\;{\mu}$-bolometer is used. The required functions are confirmed with 10 frame/second of processing performance by testing of the prototype and Practicality of the system was verified.

Least Squares Based Adaptive Motion Vector Prediction Algorithm for Video Coding (동영상 압축 방식을 위한 최소 자승 기반 적응 움직임 벡터 예측 알고리즘)

  • Kim, Ji-hee;Jeong, Jong-woo;Hong, Min-Cheol
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.29 no.9C
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    • pp.1330-1336
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    • 2004
  • This paper addresses an adaptive motion vector prediction algorithm to improve the performance of video encoder. The block-based motion vector is characterized by non-stationary local statistics so that the coefficients of LS (Least Squares) based linear motion can be optimized. However, it requires very expensive computational cost. The proposed algorithm using LS approach with spatially varying motion-directed property adaptively controls the coefficients of the motion predictor and reduces the computational cost as well as the motion prediction error. Experimental results show the capability of the proposed algorithm.

Hardware Implementation of Context Modeler in HEVC CABAC Decoder (HEVC CABAC 복호기의 문맥 모델러 설계)

  • Kim, Sohyun;Kim, Doohwan;Lee, Seongsoo
    • Journal of IKEEE
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    • v.21 no.3
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    • pp.280-283
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    • 2017
  • HEVC (high efficiency video coding) exploits CABAC (context-based adaptive binary arithmetic coding) for entropy coding, where a context model estimates the probability for each syntax element. In this paper, a context modeler was designed and implemented for CABAC decoding. lookup table was used to reduce computation and to increase speed. 12 simulations for HEVC standard test sequences and encoder configurations were performed, and the context modeler was verified to perform correction operations. The designed context modeler was synthesized in 0.18um technology. Maximum frequency, maximum throughput, and gate count are 200 MHz, 200 Mbin/s, and 29,268 gates, respectively.

Recovering Corrupted Motion Vectors Using Edge Direction (경계 방향성을 이용한 손상된 움직임 벡터의 복원 기법)

  • 박정윤;이창우
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.26 no.11A
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    • pp.1880-1888
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    • 2001
  • In wireless communication systems, transmission errors degrade the reconstructed image quality severely. Among various techniques which reduce the degradation, the error concealment technique yields good performance without overheads and the modification of the encoder. In this paper, we have proposed the technique for recovering the corrupted motion vector using the edge direction of blocks which surround the corrupted block, when the video information is compressed by H.263 standard. We uses the property that each object in video sequences shows the same motion. For the estimation of edge directions, the first AC coefficients of blocks are used. Extensive simulation results show that the proposed technique yields good performance with a reduced computational complexity.

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