• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.3
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• pp.527-533
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• 2008

Motion compensation always produces the principal bottleneck in the real-time high quality video applications. Therefore, a fast dedicated hardware is needed to perform motion compensation in the real-time video applications. In many video encoding methods, the frames are partitioned into blocks of Pixels. In general, motion compensation predicts present block by estimating the motion from previous frame. In motion compensation, the higher pixel accuracy shows the better performance but the computing complexity is increased. In this paper, we studied an architecture of motion compensator suitable for H.264/AVC encoder that supports quarter-pixel accuracy. The designed motion compensator increases the throughput using transpose array and 3 6-tap Luma filters and efficiently reduces the memory access. The motion compensator is described in VHDL and synthesized in Xilinx ISE and verified using Modelsim_6.1i. Our motion compensator uses 36-tap filters only and performs in 640 clock-cycle per macro block. The motion compensator proposed in this paper is suitable to the areas that require the real-time video processing.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.12
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• pp.141-146
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• 2016

HEVC/H.265 is the latest joint video coding standard proposed by ITU-T SG 16 WP and ISO/IEC JTC 1/SC29/WG 11. In H.265, pictures are divided into a sequence of coding tree units(CTUs), and the CTU further is partitioned into multiple CUs to adapt to various local characteristics. Its coding efficiency is approximately two times high compared to previous standard H.264/AVC. However according to the size of extended CU(coding unit) and transform block, the hardware size of PMR(prediction/mode decision/reconstruction) block within video encoder is about 4 times larger than previous standard. In this study, we propose a new less complex hardware architecture of PMR block which has the most high complexity within encoder without any noticeable PSNR loss. Using this simplified block, we can shrink the overall size the H.265 encoder. For FHD image, it operates at clocking frequency of 300 MHz and frame rate of 60 fps. And also for the test image, the Bjøntegaard Delta (BD) bit rate increase about average 30 % in PMR prediction block, and the total estimated gate count of PMR block is around 1.8 M.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.41 no.1
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• pp.13-20
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• 2004

In this paper, we have analyzed the current MPEG-4 video encoding tools and proposed efcient coding techniques that reduce the complexity of the encoder. Until recently, encoder optimization without shape coding has been a major concern in video for wire/wireless low bit rate coding services. Recently, we found out that the computational complexity of MPEG-4 shape coding plays a very important role in the object-based coding through experiments. We have made an experiment whether we could get optimized object-based coding method through successfully combining latest optimized texture coding techniques with our proposed optimized shape coding techniques. In texture coding, we applied the MVFAST method for motion estimation. We chose not to use IVOPF(Intelligent VOP Formation) but to use TRB(Tightest Rectangular Boundary) for positioning VOP and, finally, to eliminate the spiral search of shape motion estimation to reduce the complexity in shape coding. As a result of experiment, our proposed scheme achieved improved time complexity over the existing reference software by $57.3\%$ and over the optimized method on which only shape coding was applied by $48.7\%$, respectively.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.6C
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• pp.842-847
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• 2004

We present a new video coding technique to tradeoff frame rate and picture quality for low bit rate video coding. We show a model equation for selecting the optimal frame rate from the motion content of the source video. We can determine DCT quantization parameter (QP) using the frame rate and bit rate. For objective video quality measurement we propose a simple and effective error measure for skipped frames. The proposed method enhances the video quality up to 2 ㏈ over the H.263 TMN5 encoder.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.10 no.4
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• pp.1877-1891
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• 2016

In video coding, the goal of rate control (RC) is not only to avoid the undesirable fluctuation in bit allocation, but also to provide a good visual perception. In this paper, a novel frame-level rate control algorithm for High Efficiency Video Coding (HEVC) is proposed. Firstly a model that reveals the relationship between bit per pixel (bpp), the bitrate of the intra frame and the bitrate of the subsequent inter frames in a group of pictures (GOP) is established, based on which the target bitrate of the first intra frame is well estimated. Then a novel frame-level bit allocation algorithm is developed, which provides a robust bit balancing scheme between the intra frame and the inter frames in a GOP to achieve the visual quality smoothness throughout the whole sequence. Our experimental results show that when compared to the RC scheme for HEVC encoder HM-16.0, the proposed algorithm can produce reconstructed frames with more consistent objective video quality. In addition, the objective visual quality of the reconstructed frames can be improved with less bitrate.

• Journal of Korea Multimedia Society
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• v.20 no.5
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• pp.731-739
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• 2017

Distributed compressed video sensing (DCVS) is a framework that integrates both compressed sensing and distributed video coding characteristics to achieve a low complexity video sampling. In DCVS schemes, motion estimation & motion compensation is employed at the decoder side, similarly to distributed video coding (DVC), for a low-complex encoder. However, since a simple BCS-SPL algorithm is applied to a residual arising from motion estimation and compensation in conventional MC-BCS-SPL (motion compensated block compressed sensing with smoothed projected Landweber) scheme, the reconstructed visual qualities are severly degraded in Wyner-Ziv (WZ) frames. Furthermore, the scheme takes lots of iteration to reconstruct WZ frames. In this paper, the conventional MC-BCS-SPL algorithm is improved to be operated in more effective way in WZ frames. That is, first, the proposed algorithm calculates a correlation coefficient between two reference key frames and, then, by selecting adaptively the reference frame, the residual reconstruction in pixel domain is performed to the conventional BCS-SPL scheme. Experimental results show that the proposed algorithm achieves significantly better visual qualities than conventional MC-BCS-SPL algorithm, while resulting in the significant reduction of the decoding time.

• Journal of the Korea Computer Industry Society
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• v.2 no.2
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• pp.211-218
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• 2001

In this paper, we propose the structure of utilizing the memory map, which is using not conventional DRAM but SDRAM, for the hardware implementation of frame memory interface module to the video encoder. As reducing the size of memory map and interface buffer within the same bus, the hardware complexity is improved and the hardware size is minimized as simplifying the interface logic. The conventional system is wasted access time, because of accessing randomly stored data in order to store and output the memories in macro-block unit. therefore the method, which is proposed in this paper, can be effectively reducing the access time of memory, because of the data is stored and processed by line unit.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.7
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• pp.1694-1701
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• 2013

Distributed video coding technique(DVC) is needed for several applications with low bit rate or low encoding resources. However, since conventional DVC schemes have performance limitations and so as one of the several methods to overcome this problem and to improve the coding efficiency, DVC scheme with the moving information of side information has been developed. Based on this system, in this paper, an efficient reliability estimation is introduced to evaluate the blocks composing of side information and send these blocks location to the encoder side. Then, these enable the encoder to selectively encode and to improve the coding performance. Experimental results show that the proposed scheme performs better than the conventional coding scheme.

• ETRI Journal
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• v.38 no.5
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• pp.807-817
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• 2016

A novel fast algorithm is suggested for a coding unit (CU) mode decision using pseudo rate-distortion based on a separated encoding structure in High Efficiency Video Coding (HEVC). A conventional HEVC encoder requires a large computational time for a CU mode prediction because prediction and transformation procedures are applied to obtain a rate-distortion cost. Hence, for the practical application of HEVC encoding, it is necessary to significantly reduce the computational time of CU mode prediction. As described in this paper, under the proposed separated encoder structure, it is possible to decide the CU prediction mode without a full processing of the prediction and transformation to obtain a rate-distortion cost based on a suitable condition. Furthermore, to construct a suitable condition to improve the encoding speed, we employ a pseudo rate-distortion estimation based on a Hadamard transformation and a simple quantization. The experimental results show that the proposed method achieves a 38.68% reduction in the total encoding time with a similar coding performance to that of the HEVC reference model.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.8
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• pp.1513-1526
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• 2009

The SVC (Scalable Video Coding) scheme can be effectively used for reducing the redundancy and for improving the coding efficiency but, it requires very high computational complexities. In order to accelerate the successful standardization and commercialization of the Advanced Terrestrial-DMB service, it is necessary to overcome this problem. For this aim, in this paper, we propose an efficient aggregated encoder control algorithm, which shows better performances than the conventional control scheme. Computer simulation result shows that the proposed scheme performs about up to 0.3dB better than those of the conventional scheme. Additionally, based on this control scheme, we propose a fast mode decision method by constraining the redundant coding modes based on the statistical properties of the quantization parameter in the spatial scalable encoder. Through computer simulations, it is shown that the proposed control schemes reduce the heavy computational burden up to 12% compared to the conventional scheme, while keeping the objective visual qualify very high.