• Title/Summary/Keyword: Um-Yang

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IBS electrode structure for enhanced performance in ac PDP

  • Yang, Seung-Hee;Moon, Jae-Seung;Kim, Kwang-Nyun;Moon, Cheol-Hee
    • 한국정보디스플레이학회:학술대회논문집
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    • 2007.08a
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    • pp.589-592
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    • 2007
  • In this paper, we propose IBS(ITO-BUS Separated) electrode structure. BUS electrode lines are placed apart from the ITO electrode lines, and they are electrically connected with vertical auxiliary electrodes. We varied the lengths of the vertical electrodes as 70, 120, 320um. The highest luminous efficiency and the largest IR emission peak were obtained for 70um length.

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A Study on the Su hyeol lon (兪穴論) of the Nan gyeong (難經) (난경(難經).유혈론(兪穴論)에 대(對)한 연구(硏究))

  • Kim, Young-Un
    • Journal of the Korean Institute of Oriental Medical Informatics
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    • v.15 no.1
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    • pp.11-55
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    • 2009
  • The nan gyeong(難經) is another name of hwang je pal sib-il nan gyeong(黃帝八十一難經) which is book of traditional oriental medicine that contains many medical theories. This thesis studies 'su-hyeol'(兪穴) that is recorded in the books. 1. '62th nan' contains that um-gyeong(陰經) has five su-hyeols and yang-gyeong(陽經) has six su-hyeols. 2. '63th nan' contains why Jeong-hyeol(井穴) starts at first among the five su-hyeols. 3. '64th nan' appears su-hyeol's character and explains it's reason. 4. '65th nan' discusses that some divisions of su-hyeol's character correspond with the climate. 5. '66th nan' explains the importance of 'Won-hyeol(原穴). 6. '67th nan' appears the eum-yang's character of 'Mo-hyeol'(募穴), eum-yang's character of 'Bae-suhyeol'(背兪穴), it's situation and it's pathological significance. 7. '68th nan' explains the stream of 'su-hyeol' in twelve meridians and it's symptoms of a disease. The Nan gyeong(難經) has the difficulty in it's contents and many scholars take charge of that differently. In that reason, each argument is subjectly. This thesis unites scholar's arguments of 'Su-hyeol'(兪穴) as many as possibly and investigates their differences objectively.

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A Reconfigurable 4th Order ΣΔ Modulator with a KT/C Noise Reduction Circuit

  • Yang, Su-Hun;Seong, Jae-Hyeon;Yoon, Kwang-Sub
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.17 no.2
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    • pp.294-301
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    • 2017
  • This paper presents a low power ${\Sigma}{\Delta}$ modulator for an implantable chip to acquire a bio-signal such as EEG, DBS, and EMG. In order to reduce a power consumption of the proposed fourth order modulator, two op-amps utilized for the first two integrators are reconfigured to drive the second two integrators. The KT/C noise reduction circuit in the first two integrators is employed to enhance SNR of the modulator. The proposed circuit was fabricated in a 0.18 um CMOS n-well 1 poly 6 metal process with the active chip core area of $900um{\times}800um$ and the power consumption of 830 uW. Measurement results were demonstrated to be SNDR of 76 dB, DR of 77 dB, ENOB of 12.3 bit at the input frequency of 250 Hz and the clock frequency of 256 kHz. FOM1 and FOM2 were measured to be 41 pJ/step and 142.4 dB, respectively.

Microfluidic LOC System (Microfluidic LOC 시스템)

  • Kim, Hyun-Ki;Gu, Hong-Mo;Lee, Yang-Du;Lee, Sang-Yeol;Yoon, Young-Soo;Ju, Byeong-Kwon
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.07b
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    • pp.906-911
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    • 2004
  • In this paper, we used only PR as etching mask, while it used usually Cr/AU as etching mask, and in order to fabricate a photosensor has the increased sensitivity, we investigated on the sensitivity of general type and p-i-n type diode. we designed microchannel size width max 10um, min 5um depth max 10um, reservoir size max 100um, min 2mm. Fabrication of microfluidic devices in glass substrate by glass wet etching methods and glass to glass fusion bonding. The p-i-n diode has higher sensitivity than photodiode. Considering these results, we fabricated p-i-n diodes on the high resistive($4k{\Omega}{\cdot}cm$) wafer into rectangle and finger pattern and compared internal resistance of each pattern. The internal resistance of p-i-n diode can be decreased by the application of finger pattern has parallel resistance structure from $571\Omega$ to $393\Omega$.

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DC-DC Boost Converter with Dead-Time Adaptive Control and Power Switching (Dead-Time 적응제어 기능과 Power Switching 기능을 갖는 DC-DC 부스트 변환기)

  • Lee, Joo-young;Yang, Min-jae;Kim, Doo-Hoi;Yoon, Eun-jung;Yu, Chong-gun
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2013.10a
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    • pp.361-364
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    • 2013
  • Since the non-overlapping gate driver used in conventional DC-DC boost converters generates fixed dead-times, the converters suffer from the body-diode conduction loss or the charge-sharing loss. A adaptive control method has been proposed to reduce these loses. In this method, however, occurrence of and overlapping time of two power transistors in CCM results in reduction of efficiency. In this paper, to overcome this problem a new adaptive control method in proposed, and a DC-DC boost converter with the proposed adaptive control and power switching has been designed in a 0.35um CMOS process. The designed converter outputs 3.3V from a input voltage of 2.5V. The switching frequency is 500kHz and the maximum power efficiency is 95.3% at a load current 150mA. The designed chip area is $1720um{\times}1280um$.

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A CMOS Interface Circuit with MPPT Control for Vibrational Energy Harvesting (진동에너지 수확을 위한 MPPT 제어 기능을 갖는 CMOS 인터페이스 회로)

  • Yang, Min-jae;Yoon, Eun-jung;Yu, Chong-gun
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2015.10a
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    • pp.412-415
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    • 2015
  • This paper presents a MPPT(Maximum Power Point Tracking) control CMOS interface circuit for vibration energy harvesting. The proposed circuit consists of an AC-DC converter, MPPT Controller, DC-DC boost converter and PMU(Power Management Unit). The AC-DC converter rectifies the AC signals from vibration devices(PZT). MPPT controller is employed to harvest the maximum power from the PZT and increase efficiency of overall system. The DC-DC boost converter generates a boosted and regulated output at a predefined level and provides energy to load using PMU. A full-wave rectifier using active diodes is used as the AC-DC converter for high efficiency, and a schottky diode type DC-DC boost converter is used for a simple control circuitry. The proposed circuit has been designed in a 0.35um CMOS process. The chip area is $950um{\times}920um$.

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A Dual-Input Energy Harvesting Charger with MPPT Control (MPPT 제어 기능을 갖는 이중 입력 에너지 하베스팅 충전기)

  • Jeong, Chan-ho;Kim, Yong-seung;Jeong, Hyo-bum;Yang, Min-jae;Yoon, Eun-jung;Yu, Chong-gun
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2015.10a
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    • pp.484-487
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    • 2015
  • This paper describes a dual-input battery charger with MPPT control using photovoltaic and piezoelectric energy. Each energy is harvested from photovoltaic cells and piezoelectric cells and is stored to each capacitor. The battery voltage is boosted by charger block and two energy sources are used as input to charge battery capacitor. A DC-DC boost converter is designed to boost the battery voltage, and inductor sharing technique is employed such that only one inductor is required. The time division ratio for piezoelectric cell and photovoltaic cell is set to 8:1. The proposed circuit is designed in a 0.35um CMOS process technology. The condition of battery capacitor is managed by battery management block and the battery voltage can be boosted up to 3V. The maximum efficiency of the designed entire system is 88.56%, and the chip area including pads is $1230um{\times}1330um$.

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A CMOS Switched-Capacitor Interface Circuit for MEMS Capacitive Sensors (MEMS 용량형 센서를 위한 CMOS 스위치드-커패시터 인터페이스 회로)

  • Ju, Min-sik;Jeong, Baek-ryong;Choi, Se-young;Yang, Min-Jae;Yoon, Eun-jung;Yu, Chong-gun
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2014.10a
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    • pp.569-572
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    • 2014
  • This paper presents a CMOS switched-capacitor interface circuit for MEMS capacitive sensors. It consist of a capacitance to voltage converter(CVC), a second-order ${\Sigma}{\Delta}$ modulator, and a comparator. A bias circuit is also designed to supply constant bias voltages and currents. This circuit employes the correlated-double-sampling(CDS) and chopper-stabilization(CHS) techniques to reduce low-frequency noise and offset. The designed CVC has a sensitivity of 20.53mV/fF and linearity errors less than 0.036%. The duty cycle of the designed ${\Sigma}{\Delta}$ modulator output increases about 5% as the input voltage amplitude increases by 100mV. The designed interface circuit shows linearity errors less than 0.13%, and the current consumption is 0.73mA. The proposed circuit is designed in a 0.35um CMOS process with a supply voltage of 3.3V. The size of the designed chip including PADs is $1117um{\times}983um$.

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A CMOS Interface Circuit for Vibrational Energy Harvesting (진동에너지 수확을 위한 CMOS 인터페이스 회로)

  • Yang, Min-jae;Yoon, Eun-jung;Yu, Chong-gun
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2014.10a
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    • pp.267-270
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    • 2014
  • This paper presents a CMOS interface circuit for vibration energy harvesting. The proposed circuit consists of an AC-DC converter and a DC-DC boost converter. The AC-DC converter rectifies the AC signals from vibration devices(PZT), and the DC-DC boost converter generates a boosted and regulated output at a predefined level. A full-wave rectifier using active diodes is used as the AC-DC converter for high efficiency, and a schottky diode type DC-DC boost converter is used for a simple control circuitry. A MPPT(Maximum Power Point Tracking) control is also employed to harvest the maximum power from the PZT. The proposed circuit has been designed in a 0.35um CMOS process. The chip area is $530um{\times}325um$. Simulation results shows that the maximum efficiencies of the AC-DC converter and DC-DC boost converter are 97.7% and 89.2%, respectively. The maximum efficiency of the entire system is 87.2%.

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Health Risk Assessment of Lead Ingestion Exposure by Particle Sizes in Crumb Rubber on Artificial Turf Considering Bioavailability

  • Kim, Sun-Duk;Yang, Ji-Yeon;Kim, Ho-Hyun;Yeo, In-Young;Shin, Dong-Chun;Lim, Young-Wook
    • Environmental Analysis Health and Toxicology
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    • v.27
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    • pp.5.1-5.10
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    • 2012
  • Objectives: The purpose of this study was to assess the risk of ingestion exposure of lead by particle sizes of crumb rubber in artificial turf filling material with consideration of bioavailability. Methods: This study estimated the ingestion exposure by particle sizes (more than 250 um or less than 250 um) focusing on recyclable ethylene propylene diene monomer crumb rubber being used as artificial turf filling. Analysis on crumb rubber was conducted using body ingestion exposure estimate method in which total content test method, acid extraction method and digestion extraction method are reflected. Bioavailability which is a calibrating factor was reflected in ingestion exposure estimate method and applied in exposure assessment and risk assessment. Two methods using acid extraction and digestion extraction concentration were compared and evaluated. Results: As a result of the ingestion exposure of crumb rubber material, the average lead exposure amount to the digestion extraction result among crumb rubber was calculated to be $1.56{\times}10^{-4}$ mg/kg-day for low grade elementary school students and $4.87{\times}10^{-5}$ mg/kg-day for middle and high school students in 250 um or less particle size, and that to the acid extraction result was higher than the digestion extraction result. Results of digestion extraction and acid extraction showed that the hazard quotient was estimated by about over 2 times more in particle size of lower than 250 um than in higher than 250 um. There was a case of an elementary school student in which the hazard quotient exceeded 0.1. Conclusions: Results of this study confirm that the exposure of lead ingestion and risk level increases as the particle size of crumb rubber gets smaller.