• Journal of Digital Contents Society
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• v.13 no.4
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• pp.525-530
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• 2012

Wireless sensor networks consist of resource constraint devices which typically send data measured by sensors attached to the end devices towards a coordinator. One of the best solution for wireless sensor networks is ZigBee, where it is wireless standard introduced for low power, low cost wireless communication with moderate data rates. In this paper, we present porting of Z-Stack and implementation of UART on the TI CC2530. We show that our implemented board works correctly in terms of transmitting and receiving data via serial port.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.9
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• pp.31-39
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• 2011

In this paper, we propose a signal readout system with small area and low power consumption for CNT sensor arrays. The proposed system consists of signal readout circuitry, a digital controller, and UART I/O. The key components of the signal readout circuitry are 64 transimpedance amplifiers (TIA) and SAR-ADC with 11-bit resolution. The TIA adopts an active input current mirror (AICM) for voltage biasing and current amplification of a sensor. The proposed architecture can reduce area and power without sampling rate degradation because the 64 TIAs share a variable gain amplifier (VGA) which needs large area and high power due to resistive feedback. In addition, the SAR-ADC is designed for low power with modified algorithm where the operation of the lower bits can be skipped according to an input voltage level. The operation of ADC is controlled by a digital controller based on UART protocol. The data of ADC can be monitored on a computer terminal. The signal readout circuitry was designed with 0.13${\mu}m$ CMOS technology. It occupies the area of 0.173 $mm^2$ and consumes 77.06${\mu}W$ at the conversion rate of 640 samples/s. According to measurement, the linearity error is under 5.3% in the input sensing current range of 10nA - 10${\mu}A$. The UART I/O and the digital controller were designed with 0.18${\mu}m$ CMOS technology and their area is 0.251 $mm^2$.

• Journal of Digital Contents Society
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• v.13 no.3
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• pp.353-358
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• 2012

Wireless sensor networks consist of resource constraint devices which typically send data measured by sensors attached to the end devices towards a coordinator. The most often used medium access control protocol used in wireless sensor networks is the standard IEEE 802.15.4, where it is wireless standard introduced for low power, low cost wireless communication with moderate data rates. In this paper, we present implementation of both the IEEE 802.15.4 protocol stack and UART interface on the TI CC2530. We show that data via UART of our implemented IEEE 802.15.4 board are transmitted correctly in terms of captured frames.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.865-868
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• 2005

This paper presents a Clock-gating technique that reduces power dissipation of the sequential circuits in the system. The Master Clock of a Clock-gating technique is formed by a quaternary variable. It uses the covering relationship between the triggering transition of the clock and the active cycles of various flip-flops to generate a slave clock for each flip-flop in the circuit. At current RTL designs flip-flop is acted by Master clock's triggering but the Slave Clock of Clock-gating technique doesn't occur trigger when external input conditions have not matched with a condition of logic table. We have applied our clocking technique to UART controller of 8bit microprocess

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2004.05b
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• pp.669-673
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• 2004

인터넷의 사용이 증가, 네트워크 기술이 발달하면서 컴퓨터 및 하드웨어 장비는 고속화 대용량화, 소형화 추세로 가고 있고, 기존에 외부 인터페이스와의 데이터 송수신 또한 병렬 포트를 이용한 통신이 많았으나, 외부 장비의 소형화와 고속화 그리고 휴대화가 요구되면서 차츰 직렬 포트를 이용하여 적은 전송라인을 이용한 외부 장비와의 인터페이스가 요구 되게 되었다. 본 논문에서는 내부 모듈간의 인터페이스와 외부 장치와의 데이터 송/수신이 가능한 UART 인터페이스 모듈을 하드웨어 설계언어인 VHDL 언어를 이용하여 설계하였으며, FPGA 칩인 Xilinx(Spartan II) 데스트 보드에 다운로드하여 시뮬레이션 하였다. 또한 양방향성 공통 버스로의 인터페이스 회로 설계와 다른 클럭으로 동작하는 시스템과의 비동기 회로의 동작 메커니즘을 쉽게 설계하였고, 비동기 통신 기능에 있어서 실제로 사용이 가능하도록 설계하였다.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.10a
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• pp.281-284
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• 2008

This paper describes ASIC design of multimedia SoC Platform. The implemented Platform consists of 32-bit OpenRISC1200 Microprocessor, WISHBONE on-chip bus, VGA Controller, Debug Interface, SRAM Interface and UART. The 32-bit OpenRISC1200 processor has 5 stage pipeline and Harvard architecture with separated instruction/data bus. The VGA Controller can display RCB data on a CRT or LCD monitor. The Debug Interface supports a debugging function for the Platform. The SRAM Interface supports 18-bit address bus and 32-bit data bus. The UART provides RS232 protocol, which supports serial communication function. The Platform is design and verified on a Xilinx VERTEX-4 XC4VLX80 FPGA board. Test code is generated by a cross compiler' and JTAG utility software and gdb are used to download the test code to the FPGA board through parallel cable. Finally, the Platform is implemented into a single ASIC chip using Chatered 0.18um process and it can operate at 100MHz clock frequency.

• Journal of Advanced Navigation Technology
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• v.23 no.5
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• pp.452-459
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• 2019

In this paper, we describe a PCM encoder structure that can update the telemetry system parameters in real time. In the PCM encoder, an analog signal control unit for FPGA, flash memory, and sensor data acquisition was constructed. UART communication, analog signal control, flash memory control, and frame generation are possible through logic inside FPGA of PCM encoder. UART communication allows the PC to transmit parameter data to the PCM encoder, and flash memory is controlled to update the parameter of the telemetry system in real time and finally the frame is formed. Simulation and verification were performed to confirm whether the parameter data is updated in real time, and the proposed structure was used to construct a telemetry system with enhanced flexibility and convenience.

• Journal of the Korea Convergence Society
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• v.13 no.4
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• pp.53-61
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• 2022

Accidents are steadily occurring due to machine defects and carelessness during LNG storage operations. In previous studies, an environmental sensor module capable of measuring pressure, temperature, gas concentration, and flow to detect danger in advance was developed and the response speed according to the amount of leaked gas was measured. This paper proposes the development of a wired and wireless communication module that transmits data measured by the environmental sensor module to embedded devices connected to wired and wireless networks of SPI, UART, and LTE. First, a data communication module capable of interworking with an environmental sensor is designed. Design a protocol between devices in the Local Control Part and wired and wireless protocols in the Local Control Part and Remote Control Part. Ethernet, WiFi, and LTE communication modules were designed, and UART and SPI channels that can be linked with embedded controllers were designed. As a result, it was confirmed through a UI (User Interface) that each embedded device transmits data measured by the environmental sensor module while simultaneously communicating on a wired and wireless basis.

• Journal of IKEEE
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• v.24 no.2
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• pp.486-491
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• 2020

ARM Cortex-M0 DesignStart provided by ARM is cost-free design development suit targeting for designing and prototyping SoC with Cortex-M0 core. In this paper, we presents a method how to implement a custom system design using ARM Cortex-M0 DesignStart. First, hardware elements for ARM Cortex-M0 DesginStart is analyzed focusing on bus and memory map, and next software toolchain is explained to clarify the translating process from high level language to binary machine language. As an example of the custom system, UART system operated with Cortex-M0 is designed and simulated.

• Journal of IKEEE
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• v.24 no.4
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• pp.1172-1175
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• 2020

Automotive ECU integrates CPU core, IVN controller, memory interface, sensor interface, I/O interface, and so on. Current automotive ECUs are often developed with proprietary processor architectures. However, demends for standard processors such as ARM and RISC-V increase rapidly for saftware compatibility in autonomous vehicles and connected cars. In this paper, an automotive ECU is designed for parking assist system based on RISC-V with open instruction set architecture. It includes 32b RISC-V CPU core, IVN controllers such as CAN and LIN, memory interfaces such as ROM and SRAM, and I/O interfaces such as SPI, UART, and I2C. Fabricated in 65nm CMOS technology, its operating frequency, area, and gate count are 50MHz, 0.37㎟, and 55,310 gates, respectively.