• Journal of Advanced Marine Engineering and Technology
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• v.37 no.4
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• pp.409-417
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• 2013

Mu-communication board supported by multi-communication is designed with Atxmega 128A1 which is a low power energy consuming of 8-bit microcontroller. ATxmega128A1 microcontroller consists of 8 UART(Universal asynchronous receiver/transmitter) ports which can be setting appropriate user interface having command line interpreter(CLI) program with each port, 2 kbytes EEPROM, 128 kbytes flash memory, 8 kbytes SRAM. 8 URAT ports are used for the multi communication modem, GPS module, etc. and EEPROM is used for saving a configuration for program running, and flash memory of 128 kbytes is used for storing a Firm Ware, and 8 kbytes SRAM is used for stack, storing memory of global variables while program running. If we uses the hybrid communication of path optimization of VHF, TRS and CDMA to remote control AtoN(aid to navigation), it is able to remove the communication shadow area. Even though there is a shadow area for individual communication method, we can select an optimum communication method. The compatibility of data has been enhanced as using of same data frame per communication devices. For the test, 8640 of data has been collected from the each buoy during 30 days in every 5 minutes and the receiving rate of the data has shown more than 99.4 %.

• Journal of Digital Contents Society
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• v.15 no.4
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• pp.481-489
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• 2014

In this paper, the automatic standby power blocking socket outlet to reduce standby power by blocking power threshold is implemented. Where, the standby power means a flowing power when a disused power electronic is plugged into the socket outlet. The proposed socket outlet can cut off the standby power by establishing a proper block power threshold electronic device according to each electronic device because it can monitor the amount of power through the smart machines such as the real-time PC or mobile phone and directly control the blocking power threshold. The software is implemented by using Visual Studio software, code vision and SN8 C studio, and the hardware is embodied in ATmega128, SN8F27E93S, USB to UART, and relay etc. Through the simulation, we find that the standby power of the proposed method is similar to that of the conventional method in case of the cellular phone but the standby power of the proposed method is much less than that of the conventional method in case of the computer, air conditioning, and set-top box. Therefore, it is proved that the proposed socket outlet has a superior performance in terms of the standby power.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.3
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• pp.503-510
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• 2006

Readout circuit is to convert signal occurred in a defector into suitable signal for image signal processing. In general, it has to possess functions of impedance matching with perception element, amplification, noise reduction and cell selection. It also should satisfies conditions of low-power, low-noise, linearity, uniformity, dynamic range, excellent frequency-response characteristic, and so on. The technical issues in developing image processing equipment for focal plane way (FPA) can be categorized as follow: First, ultraviolet (UV) my detector material and fine processing technology. Second, ReadOut IC (ROIC) design technology to process electric signal from detector. Last, package technology for hybrid bonding between detector and ROIC. ROIC enables intelligence and multi-function of image equipment. It is a core component for high value added commercialization ultimately. Especially, in development of high-resolution image equipment ROIC, it is necessary that high-integrated and low-power circuit design technology satisfied with design specifications such as detector characteristic, signal dynamic range, readout rate, noise characteristic, ceil pitch, power consumption and so on. In this paper, we implemented a $8\times8$ FPA prototype ROIC for reduction of period and cost. We tested unit block and overall functions of designed $8\times8$ FPA ROIC. Also, we manufactured ROIC control and image boards, and then were able to verify operation of ROIC by confirming detected image from PC's monitor through UART(Universal Asynchronous Receiver Transmitter) communication.

• Journal of the Institute of Convergence Signal Processing
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• v.11 no.2
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• pp.177-182
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• 2010

The flow of a universal system-level design methodology consists of system specification, system-level hardware/software partitioning, co-design, co-verification using virtual or physical prototype, and system integration. In the developing process of a hardware component in system, the design phase has been regarded as a phase consuming lots of time and cost. However, the verification phase in which functionality of the designed component is verified has recently been considered as a much important phase. In this paper, the implementation of a verification environment which is based on SystemC infrastructure and verifies the functionality of a hardware component is described. The proposed verification system uses SystemC user-defined channel as communication interface between variables of SystemC module and registers of Verilog module. The functional verification of an UART is performed on the proposed verification system. SystemC provides class library for hardware modeling and has an advantage of being able to design a system consisting hardware and software in higher abstraction level than register transfer level. Source codes of SystemC modules are reusable with a minor adaptation on verifying functionality of another hardware component.

• Journal of the Korea Convergence Society
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• v.7 no.1
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• pp.9-15
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• 2016

In this paper, we describe the design of a high speed data acquisition system(DAS) with STM32 processor based on Cortex-M4. The system is used for the sensor devices to collect raw data on production lines at factory and send them to the servo computer in real time. The system is designed for multi functions with universal asynchronous receiver and transmitter(UART), analog to digital converter(ADC), digital to analog converter(DAC), and general purpose input output(GPIO). those are well tested for various data acquisition and high speed motor control in real time.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.17 no.6
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• pp.39-46
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• 2003

In this papers, We studied system requirement specification, hardware design and implementation, protective algorithm and software design method to implement digital protective relay which has high trust and high function of protection as well as control and metering for power transformers. Protective relay for transformer is implemented on real time using DSP, which is the specific processor for digital signal processing, as a result, it is completed by the wide improvement of arithmetic capability of protective relay. Reliability is proved testing operating value and operating time, reset value and reset time of an relaying element using protective relay tester made in NF Corporation of Japan.

• The Journal of Korea Robotics Society
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• v.4 no.1
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• pp.1-9
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• 2009

Radio Frequency Identification (RFID) is an automatic identification method. Information such as identification, logistics history, and specification of products are written and stored into the memory of RFID tags (that is, transponders), and retrieved through RF communication between RFID reader device and RFID tags. RFID systems have been applied to many fields of transportation, industry, logistics, environment, etc in order to improve business efficiency and reduce maintenance cost as well. Recently, some research results are announced in which RFID devices are combined with other sensors for mobile robot localization. In this paper, design of multi-protocol baseband for RFID reader device is proposed, and the baseband modem is implemented into SoC (System On a Chip). The baseband modem SoC for multi-protocol RFID reader is composed of several IP (Intellectual Property) blocks such as multi-protocol blocks, CPU, UART(Universal Asynchronous Receiver and Transmitter), memory, etc. As a result, the SoC implemented with FPGA(Field Programmable Gate Array) is applied to real product. It is shown that the size of RFID Reader module designed with the FPGA becomes smaller, and the SoC chip price for the same function becomes cheap. In addition, operation performance could be the same or better than that of the product with no SoC applied.

• ETRI Journal
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• v.25 no.5
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• pp.328-336
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• 2003

Bluetooth is a specification for short-range wireless communication using the 2.4 GHz ISM band. It emphasizes low complexity, low power, and low cost. This paper describes an area-efficient digital baseband module for wireless technology. For area-efficiency, we carefully consider hardware and software partitioning. We implement complex control tasks of the Bluetooth baseband layer protocols in software running on an embedded microcontroller. Hardware-efficient functions, such as low-level bitstream link control; host controller interfaces (HCIs), such as universal asynchronous receiver transmitter (UART) and universal serial bus (USB)interfaces; and audio Codec are performed by dedicated hardware blocks. Furthermore, we eliminate FIFOs for data buffering between hardware functional units. The design is done using fully synthesizable Verilog HDL to enhance the portability between process technologies so that our module can be easily integrated as an intellectual property core no system-on-a-chip (SoC) ASICs. A field programmable gate array (FPGA) prototype of this module was tested for functional verification and realtime operation of file and bitstream transfers between PCs. The module was fabricated in a $0.25-{\mu}m$ CMOS technology, the core size of which was only 2.79 $mm{\times}2.80mm$.

• Proceedings of the KIEE Conference
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• 1999.07b
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• pp.945-947
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• 1999

첨단의 자동화 시스템을 구축하기 위해서는 각 필드기기에서 생산되는 정보들을 적절한 형태로 가공하여 적시에 필요한 공정으로 제공하여 줄 수 있는 지능형 센서 및 필드기기의 도입이 필요하다. 이러한 필드기기들이 유기적으로 정보를 교환하고 공유하기 위해서는 통신망 시스템을 구축할 필요가 있다. 필드버스는 자동화 및 분산 제어 시스템의 컴퓨터 통신망 계층구조에서 최하위 계층 기기들 간에 실시간 통신을 제공하는 산업용 통신망이다. 본 연구에서는 통신용 프로세서인 Mc68360을 기반으로 하여 필드버스의 일종인 Profibus의 물리계층과 데이터링크계층 프로토콜을 구현하였다. 물리계층은 프로세서의 UART 통신 기능과 RS-485칩을 사용하여 구현하고, 데이터링크계층 프로토콜은 프레임 분석과 송수신, 에러처리, 흐름제어, 매체접속권한 관리 등의 기능을 소프트웨어로 구현하였다. 또한 지능형 센서 본래의 목적중의 하나인 원격관리 기능을 위하여 각 필드기기의 노드 주소, 타이머 값 등의 통신 파라미터를 원격 마스터에서 설정할 수 있도록 관리계층의 기능을 추가하였다. 본 연구에서는 각각 하나의 노드기능을 담당하는 여러 개의 보드들로 구성된 testbed를 구축하고, 다양한 통신환경에서 초기화, 정상, 비정상 상태 등의 동작을 실험하였으며, 이를 통하여 지능형 센서용 필드버스의 데이터링크계층 프로토콜이 정상적으로 동작됨을 확인하였다.

• Journal of Computing Science and Engineering
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• v.2 no.4
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• pp.321-338
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• 2008

This paper presents a Modified Multiple Depth First Search algorithm for the exploration of the indoor environments occupied with obstacles in random distribution. The proposed algorithm was designed and implemented to employ one or a team of Khepera II mini robots for the exploration process. In case of multi-robots, the BlueCore2 External Bluetooth module was used to establish wireless networks with one master robot and one up to three slaves. Messages are sent and received via the module's Universal Asynchronous Receiver/Transmitter (UART) interface. Real exploration experiments were performed using locally developed teleworkbench with various autonomy features. In addition, computer simulation tool was also developed to simulate the exploration experiments with one master robot and one up to ten slaves. Computer simulations were in good agreement with the real experiments for the considered cases of one to one up to three networks. Results of the MMDFS for single robot exhibited 46% reduction in the needed number of steps for exploring environments with obstacles in comparison with other algorithms, namely the Ants algorithm and the original MDFS algorithm. This reduction reaches 71% whenever exploring open areas. Finally, results performed using multi-robots exhibited more reduction in the needed number of exploration steps.