• Journal of Power Electronics
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• v.17 no.5
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• pp.1256-1267
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• 2017

A fault tolerant structure and its corresponding control strategy for electromagnetic stirring power supplies are proposed in this paper. The topology structure of the electromagnetic stirring power supply contains two-stages. The fore-stage is the PWM rectifier. The back-stage is the fault tolerant inverter, which is a two-phase three-bridge orthogonal inverter circuit while operating normally. When the power switch devices in the inverter are faulty, the structure of the inverter is reconfigured. The two-phase half bridge inverter circuit is constructed with the remaining power switch devices and DC-link capacitors to keep the system operating after cutting the faulty power switch devices from the system. The corresponding control strategy is proposed to let the system work under both normal and fault conditions. The reliability of the system is improved and the requirement of the electromagnetic stirring process is met. Finally, simulation and experimental results verify the feasibility of the proposed fault tolerant structure and corresponding control strategy.

• Proceedings of the KIEE Conference
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• 1995.07a
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• pp.168-170
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• 1995

This paper proposes the circuit of the simple synthetic testing facility using LC resonance circuit. The analyzed results of the circuit which can be useful for the design stage of the testing facility are also shown. EMTP has been used to analyze the circuit. Two cases of short-circuit test results obtained from the simple synthetic testing facility in KERI are shown with the waveforms of current and voltage. The results also indicate that the simple synthetic testing facility using LC resonance circuit can be easily designed and used very usefully for the research and development for the switchgears.

• The Transactions of the Korean Institute of Power Electronics
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• v.26 no.2
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• pp.82-89
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• 2021

This study proposes a DAB two-stage series structure with insulated bidirectional DC-DC converter for two-way power transfer between the renewable energy of high voltages (1 kV and above). The proposed circuit transforms the existing DAB converter into a two-stage series structure to reduce the pressure in the switch. The problem of power imbalance occurring in the design of the DAB converter second-stage series is improved by applying the cell balancing method circuit and the common mode coupled inductor using an external flying capacitor instead of reflecting the existing improvement measures, voltage balance control, and inductor current control. In addition, a no-load supercharging sequence is proposed in high voltages and high-speed switching by using the fixed duty output method. This study presents the analysis results through the structure of the proposed circuit, the principle of improving the power imbalance problem, and simulations. Prototypes were manufactured to meet the specifications of input/output voltage of 1700 V, maximum load of 65 kW, and switching frequency of 51kHz, and the validity of the topology was verified using the experimental results and efficiency data.

• Journal of Electrical Engineering and Technology
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• v.11 no.3
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• pp.644-652
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• 2016

This paper presents an improved single-stage ac-dc LED-drive flyback converter using the transformer-coupled lossless (TCL) snubber. The proposed converter is derived from the integration of a full-bridge diode rectifier and a conventional flyback converter with a simple TCL snubber. The TCL snubber circuit is composed of only two diodes, a capacitor, and a transformer-coupled auxiliary winding. The TCL snubber limits the surge voltage of the switch and regenerates the energy stored in the leakage inductance of the transformer. Also, the switch of the proposed converter is turned on at a minimum voltage using a formed resonant circuit. Thus, the proposed converter achieves high efficiency. The proposed converter utilizes only one general power factor correction (PFC) control IC as its controller and performs both PFC and output power regulation, simultaneously. Therefore, the proposed converter provides a simple structure and an economic implementation and achieves a high power factor without the need for any separate PFC circuit. In this paper, the operational principle of the proposed converter is explained in detail and the design guideline of the proposed converter is briefly shown. Experimental results for a 40-W prototype are shown to validate the performance of the proposed converter.

• Proceedings of the KIEE Conference
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• 2005.10c
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• pp.226-228
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• 2005

This paper presents the single-stage High Power Factor TTFC(Two-Transistor Forward Converter). Recently, due to growing concern about the harmonic pollution of power distribution systems and the adoption of standards such as ICE 61000-3-2 and IEEE 519, There is a need to reduce the harmonic contests of AC line currents of power supplies. This research proposed the single-stage two switch forward circuit for low voltage and high current output.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.1
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• pp.52-56
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• 2014

In this paper, a high-efficiency power amplifier is implemented using a gate and drain bias control circuit for WPT (Wireless Power Transmission). This control circuit has been employed to improve the PAE (Power Added Efficiency). The gate and drain bias control circuits consists of a directional coupler, power detector, and operation amplifier. A high gain two-stage amplifier using a drive amplifier is used for the low input stage of the power amplifier. The proposed power amplifier that uses a gate and drain bias control circuit can have high efficiency at a low and high power level. The PAE has been improved up to 80.5%.

• Journal of Power Electronics
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• v.15 no.4
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• pp.1131-1138
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• 2015

This study presents an input-powered high-efficiency interface circuit for energy harvesting systems, and introduces a zero standby power design to reduce power consumption significantly while removing the external power supply. This interface circuit is composed of two stages. The first stage voltage doubler uses a positive feedback control loop to improve considerably the conversion speed and efficiency, and boost the output voltage. The second stage active diode adopts a common-grid operational amplifier (op-amp) to remove the influence of offset voltage in the traditional comparator, which eliminates leakage current and broadens bandwidth with low power consumption. The system supplies itself with the harvested energy, which enables it to enter the zero standby mode near the zero crossing points of the input current. Thereafter, high system efficiency and stability are achieved, which saves power consumption. The validity and feasibility of this design is verified by the simulation results based on the 65 nm CMOS process. The minimum input voltage is down to 0.3 V, the maximum voltage efficiency is 99.6% with a DC output current of 75.6 μA, the maximum power efficiency is 98.2% with a DC output current of 40.4 μA, and the maximum output power is 60.48 μW. The power loss of the entire interface circuit is only 18.65 μW, among which, the op-amp consumes only 2.65 μW.

• Journal of IKEEE
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• v.28 no.1
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• pp.78-89
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• 2024

PMIC chips based on a BCD process used in automotive semiconductors require multi-time programmable (MTP) intellectual property (IP) that does not require additional masks to trim analog circuits. In this paper, MTP cell size was reduced by about 18.4% by using MTP cells using PMOS capacitors (PCAPs) instead of NMOS capacitors (NCAPs) in MTP cells, which are single poly EEPROM cells with two transistors and one MOS capacitor for small-area MTP IP design. In addition, from the perspective of MTP IP circuit design, the two-stage voltage shifter circuit is applied to the CG drive circuit and TG drive circuit of MTP IP design, and in order to reduce the area of the DC-DC converter circuit, the VPP (=7.75V), VNN (=-7.75V) and VNNL (=-2.5V) charge pump circuits using the charge pumping method are placed separately for each charge pump.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.2
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• pp.282-289
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• 2008

To improve the efficiency of PDP TV, it should minimize the power losses transpired during AC-to-DC power conversion and PDP driving process. Generally the input power supply for PDP driving employes a two-stage power factor corrected converter, and it needs additional DC-to-DC converters to supply driving power for reset circuit ed sustain driver, which has high power consumption. However, such a circuit configuration has a difficulty for the PDP market requires low cost. To alleviate this problem, a new circuit composition is presented. It integrates input power supply with reset and sustain driver in a single power stack The input power supply of the proposed circuit has a single-stage structure to minimize power conversion loss, and it directly supplies power to the sustain driver so as to reduce the system size and cost.

• Journal of Power Electronics
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• v.6 no.4
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• pp.330-339
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• 2006

This paper deals with novel electronic ballast based on single-stage power processing topology using a symmetrical half-bridge inverter and current injection circuit. The half-bridge inverter drives the output parallel resonant circuit and injects current through the power factor correction (PFC) circuit. Because of high frequency current injection and high frequency modulated voltage, the proposed circuit maintains the unity power factor (UPF) with low THD even under wide variation in ac input voltage. This circuit needs minimum and lower sized components to achieve the UPF and high efficiency. This leads to an increase in reliability of ballast at low cost. Furthermore, to reduce cost, the electronic ballast is designed for two series-connected fluorescent lamps (FL). The analysis and experimental results are presented for ($2{\times}36$ Watt) fluorescent lamps operating at 50 kHz switching frequency and input line voltage (230 V, 50 Hz).