• Journal of Power Electronics
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• 제16권2호
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• pp.498-511
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• 2016

This paper presents a single-phase five-level inverter controlled by two novel pulse width modulation (PWM) switching techniques. The proposed PWM techniques are designed based on minimum switching power loss and minimum total harmonic distortion (THD). In a single-phase five-level inverter employing six switches, the first proposed PWM technique requires four switches to operate at switching frequency and two other switches to operate at line frequency. The second proposed PWM technique requires only two switches to operate at switching frequency and the rest of the switches to operate at line frequency. Compared with conventional PWM techniques for single-phase five-level inverters, the proposed PWM techniques offer high efficiency and low harmonic components in the output voltage. The validity of the proposed PWM switching techniques in controlling single-phase five-level inverters to regulate load voltage is verified experimentally using a 100 V, 500 W laboratory prototype controlled by dspace 1103.

• 전기학회논문지
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• 제60권1호
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• pp.78-84
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• 2011

In this paper, the switching frequency and THD for the reduction instead of traditional single phase inverter using a new type of central arm of the single phase inverter is proposed. The proposed single phase inverter topology, the existing one to add a arm by two-way central switch 3-level output voltage can be raised and, central arm, especially one or two of the switches by using a switch to the diode current switching algorithm was simplified. During the dead time because of this, depending on the direction of the current level does not appear in any other existing level compared to the inverter output voltage level of the THD has the advantage that less can be. The simulation and experimental results verified the validity of the proposed topology.

• 반도체디스플레이기술학회지
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• 제17권3호
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• pp.90-94
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• 2018

In this paper, we applied a three-level T-type inverter with the one more voltage level than two-level inverter. However, the three-level T-type inverter has a systematic problem with voltage unbalances. So neutral point control is essential. Therefore, the voltage unbalance problem of the three - phase inverter was confirmed to be controlled within 5V using the neutral point control algorithm in charge and discharge mode. In addition, total harmonic distortion was reduced in three phases (u phase, v phase, w phase) when neutral point control was performed in charging mode and also in three phases (u phase, v phase, w phase) in discharge mode. In this paper suggests a neutral point control algorithm to solve the voltage unbalance of a three-level T-type inverter, and shows the improvement of the performance of the proposed algorithm through experiment.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1995년도 하계학술대회 논문집 A
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• pp.360-364
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• 1995

A zero voltage switching (ZVS) three level resonant pole inverter is presented for high power GTO inverters. The concept of auxiliary resonant commutated pole(ARCP) for two level inverter is extended to the three level inverter. The proposed auxiliary commutation circuit consists of one resonant inductor and two bi-directional switches, which provides ZVS condition to the main devices without increasing device voltage or current stresses. The auxiliary device operates with zero current switching(ZCS) which enables use of the low cost thyristors. The proposed circuit can handle higher voltage and higher power(1-10MVA) comparing to the two level one. Operation and analysis of the proposed circuit are illustrated. Experimental results with 10 KW, 4 kHz prototype are presented to verify the principle of operation.

• 조명전기설비학회논문지
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• 제18권2호
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• pp.68-74
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• 2004

본 논문에서는 고조파를 저감시키고 출력파형 개선을 위한 방법으로 입력측 DC링크 전압의 조합을 이용한 새로운 하이브리드형 멀티레벨 인버터를 제안한다. 제안한 인버터는 단상 풀-브릿지 인버터 모듈로 구성된 3개의 H-bridge cell로 구성되어 있다. 2개의 풀-브릿지 모듈은 레벨생성을 위해 사용되고 나머지 하나의 모듈은 PWM 스위칭 동작에 사용되어진다. 레벨 생성을 위한 인버터에 의해 9레벨이 생성되고 PWM 동작을 위한 인버터에 의해 2레벨이 더해지게 되어 결과적으로 총 11레벨의 출력전압을 생성시킬 수 있다. 제안한 시스템의 기본적인 동작원리를 상세하게 설명하고 PSpice 시뮬레이션과 시작품을 이용한 실험을 통해 타당성을 증명할 수 있었다.

• Journal of Power Electronics
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• 제8권2호
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• pp.171-180
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• 2008

One of the major problems in electric power quality is the harmonic contents. There are several methods of indicating the quantity of harmonic contents. The most widely used measure is the total harmonic distortion (THD). Various switching techniques have been used in static converters to reduce the output harmonic content. This paper presents and compares the two harmonic optimization techniques, known as optimal minimization of the total harmonic distortion (OMTHD) technique and optimized harmonic stepped-waveform (OHSW) technique used in multi-level inverters with unequal dc sources. Both techniques are very effective and efficient for improving the quality of the inverter output voltage. First, we describe briefly the cascaded H-bridge multi-level inverter structure. Then, we present the switching algorithm for the inverter based on OHSW and OMTHD techniques. Finally, the results obtained for the two techniques are analyzed and compared. The results verify the effectiveness of the both techniques in multi-level voltage-source inverter with non-equal dc sources, clarifying the advantages of each technique.

• 전력전자학회논문지
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• 제16권3호
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• pp.283-292
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• 2011

본 논문에서는 기존의 멀티레벨 인버터와는 달리 DC링크단에 스위치를 설치함으로써 성능을 향상시킨 새로운 형태의 H-브리지 멀티레벨 인버터를 제안한다. 제안된 방식은 계통 연계형 단상 멀티레벨 인버터로서 기존의 단상인버터에 비하여 출력 전압 파형이 정현파에 가깝고, 고압 대용량 시스템용 멀티레벨 인버터로의 확장도 용이할 뿐만 아니라 직렬연결을 통하여 간단히 전압레벨을 확장할 수 있다는 장점을 갖는다. 동일한 5레벨의 경우 기존의 H-브리지 직렬형이나 NPC형 멀티레벨 인버터는 가제어 스위치가 8개 사용되는 반면에 제안한 멀티레벨 인버터는 가제어 스위치가 6개 사용되기 때문에 회로 구성이 간단하여 신뢰도가 높고 경제적인 구현이 가능하고 스위칭 손실이 줄어서 효율이 향상되는 특징이 있다. POD 변조기법을 기반으로 하여 반송파 신호 하나만을 사용하는 새로운 PWM 방법을 제시하였으며 DC링크 커패시터 전압의 균형을 위한 스위칭 시퀀스에 대해서도 검토하였다. 제안된 토폴로지의 타당성을 시뮬레이션과 실험을 통하여 확인하였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1994년도 하계학술대회 논문집 A
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• pp.491-494
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• 1994

The 3-level inverter is applied to the induction motor drive as the voltage type inverter for large poller one. This inverter divides the DC link voltage into the two parts and it is supplied to the inverter. The 3-level inverter can reduces the voltage between the each devices, and get more sinusoidal current waveform. This paper presents the new PWM method which can reduces the harmonics. The modulation at the inverter side is implemented using a DSP microprocessor.

• Journal of Power Electronics
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• 제15권5호
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• pp.1318-1328
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• 2015

The photovoltaic (PV) power conditioning system for small-scale applications has gained significant interest in the past few decades. However, the standalone mode of operation has been rarely approached. This paper presents a two-stage multi-level micro-inverter topology that considers the different operation modes. A multi-output flyback converter provides both the DC-Link voltage balancing for the multi-level inverter side and maximum power point tracking control in grid connection mode in the PV stage. A modified H-bridge multi-level inverter topology is included for the AC output stage. The multi-level inverter lowers the total harmonic distortion and overall ratings of the power semiconductor switches. The proposed micro-inverter topology can help to decrease the size and cost of the PV system. Transient analysis and controller design of this micro-inverter have been proposed for stand-alone and grid-connected modes. Finally, the system performance was verified using a 120 W hardware prototype.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제53권7호
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• pp.452-461
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• 2004

A novel multilevel PWM inverter is presented for the use of stand-alone photovoltaic power generation system. In appearance, it consists of three full-bridge modules and three cascaded transformers; therefore, the configuration of the proposed multilevel PW inverter is equal to that of a prior 11-level PWM inverter. Only the turn-ratio of a transformer and its corresponding switching function are different from each other. Owing to these differences, the proposed 19-level PWM inverter has two promising advantages. First, output voltage levels increase almost twofold. Consequently, it can generate more sinusoidal output voltage waveform. Second, due to a revised switching pattern, it lightens power imposed on the transformer, which is used for compensating output voltages with chopped pulses between steps. The validity of the proposed inverter system is verified by computer-aided simulations and experimental results based on a 1 ［kW］ prototype. The performance of the proposed 19-level PWM inverter is compared with the Prior 11-level PWM inverter and other counterparts.