• 제목/요약/키워드: Tunneling technique

검색결과 130건 처리시간 0.028초

Lateral alveolar ridge augmentation procedure using subperiosteal tunneling technique: a pilot study

  • Kakar, Ashish;Kakar, Kanupriya;Sripathi Rao, Bappanadu H.;Lindner, Annette;Nagursky, Heiner;Jain, Gaurav;Patney, Aditya
    • Maxillofacial Plastic and Reconstructive Surgery
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    • 제40권
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    • pp.3.1-3.8
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    • 2018
  • Background: In this research article, we evaluate the use of sub-periosteal tunneling (tunnel technique) combined with alloplastic in situ hardening biphasic calcium phosphate (BCP, a compound of β-tricalcium phosphate and hydroxyapatite) bone graft for lateral augmentation of a deficient alveolar ridge. Methods: A total of 9 patients with deficient mandibular alveolar ridges were included in the present pilot study. Ten lateral ridge augmentation were carried out using the sub-periosteal tunneling technique, including a bilateral procedure in one patient. The increase in ridge width was assessed using CBCT evaluation of the ridge preoperatively and at 4 months postoperatively. Histological assessment of the quality of bone formation was also carried out with bone cores obtained at the implant placement re-entry in one patient. Results: The mean bucco-lingual ridge width increased in average from 4.17 ± 0.99 mm to 8.56 ± 1.93 mm after lateral bone augmentation with easy-graft CRYSTAL using the tunneling technique. The gain in ridge width was statistically highly significant (p = 0.0019). Histomorphometric assessment of two bone cores obtained at the time of implant placement from one patient revealed 27.6% new bone and an overall mineralized fraction of 72.3% in the grafted area 4 months after the bone grafting was carried out. Conclusions: Within the limits of this pilot study, it can be concluded that sub-periosteal tunneling technique using in situ hardening biphasic calcium phosphate is a valuable option for lateral ridge augmentation to allow implant placement in deficient alveolar ridges. Further prospective randomized clinical trials will be necessary to assess its performance in comparison to conventional ridge augmentation procedures.

일본의 Tunnel기술 (On the Tunneling technique in Japan)

  • 허진
    • 화약ㆍ발파
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    • 제12권4호
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    • pp.10-21
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    • 1994
  • The Tunneling Technique has been developing highly in Japan. Induced NATM pattern is ap-plied as it-self but is an apportunity to upgrade technologes of Concernning. As a result, Nonnel system as Laser marking system is significant developed result. Japan-Korea Tunnel leasing by international High way project is regarded hope-full for the world peace. It has described Euro-Tunnel too.

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IPv4 방화벽에 호환성을 갖는 IPv6 터널링 (IPv6 over IPv4 tunneling compatible with IPv4 Firewalls)

  • 이정남;장주욱
    • 정보처리학회논문지C
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    • 제10C권4호
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    • pp.519-524
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    • 2003
  • 본 논문은 방화벽에 독립적인 IPv6 터널링 기법의 연구에 관한 것이다. IPv4망의 인프라를 유지하면서 점진적으로 IPv6망을 확대해 나가고 있는 철재, IPv6망간의 연동을 위해서 터널링을 널리 사용하고 있으나 방화벽에 의해 IPv4로 캡슐화된 패킷이 방화벽을 통과하지 못하는 문제점이 확인되었다. 즉, 방화벽 내부의 사용자들은 IPv6망의 접속에 제한을 받게 되며 방화벽 없이 IPv6망을 구축해야 한다. 본 논문에서는 방화벽에 의해 캡슐화된 패킷이 차단되는 것을 해결하기 위한 방법으로 Double-encapsulation 방식과 HTTP 터널링 기법을 응용한 방식을 제안하였으며 실험결과 패킷 차단없이 IPv6망간의 연동이 이루어짐을 확인하였다.

ONO ($SiO_2/Si_3N_4/SiO_2$), NON($Si_3N_4/SiO_2/Si_3N_4$)의 터널베리어를 갖는 비휘발성 메모리의 신뢰성 비교

  • 박군호;이영희;정홍배;조원주
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2009년도 추계학술대회 논문집
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    • pp.53-53
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    • 2009
  • Charge trap flash memory devices with modified tunneling barriers were fabricated using the tunneling barrier engineering technique. Variable oxide thickness (VARIOT) barrier and CRESTED barrier consisting of thin $SiO_2$ and $Si_3N_4$ dielectric layers were used as engineered tunneling barriers. The VARIOT type tunneling barrier composed of oxide-nitride-oxide (ONO) layers revealed reliable electrical characteristics; long retention time and superior endurance. On the other hand, the CRESTED tunneling barrier composed of nitride-oxide-nitride (NON) layers showed degraded retention and endurance characteristics. It is found that the degradation of NON barrier is associated with the increase of interface state density at tunneling barrier/silicon channel by programming and erasing (P/E) stress.

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초고속 IP 기반에서 GRE 터널링 기법을 이용한 접속 제어 연구 (A Study on Connection Control using GRE Tunneling Technique in High-speed IP Infrastructure)

  • 이재완;김형진;고남영
    • 한국정보통신학회논문지
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    • 제10권6호
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    • pp.1038-1044
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    • 2006
  • 초고속 통신망에서 터널링 기법은 네트워크 인증 및 데이터의 보안 지원에 있다. 이를 위해 IPSec, SOCKS V5 및 GRE 터널링 프로토콜 등을 사용하고 있다. 본 논문은 초고속 통신망에서 특정 IP 대역에 대하여 라우팅 루트를 변경시켜 유해 서비스 접속 차단 및 이용자 Needs에 따라 특정 서비스에 대한 라우팅 루트를 변경시켜 이용자가 원하는 선택적인 서비스 제공 기반을 구현하고자 하였다. 따라서 GRE프로토콜을 이용하여 GRE의 동작 원리를 측정 분석하고, 그 결과를 접속 제어 및 인증 기반 서비스에 적용하고자 한다.

Limit analysis of a shallow subway tunnel with staged construction

  • Yu, Shengbing
    • Geomechanics and Engineering
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    • 제15권5호
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    • pp.1039-1046
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    • 2018
  • This paper presents a limit analysis of the series of construction stages of shallow tunneling method by investigating their respective safety factors and failure mechanisms. A case study for one particular cross-section of Beijing Subway Line 7 is undertaken, with a focus on the effects of multiple soil layers and construction sequencing of dual tunnels. Results show that using the step-excavation technique can render a higher safety factor for the excavation of a tunnel compared to the entire cross-section being excavated all at once. The failure mechanisms for each different construction stage are discussed and corresponding key locations are suggested to monitor the safety during tunneling. Simultaneous excavation of dual tunnels in the same cross-section should be expressly avoided considering their potential negative interactions. The normal and shear forces as well as bending moment of the primary lining and locking anchor pipe are found to reach their maximum value at Stage 6, before closure of the primary lining. Designing these struts should consider the effects of different construction stages of shallow tunneling method.

애드 혹 네트워크에서 위치 정보와 홉 카운트 기반 ETWAD(Encapsulation and Tunneling Wormhole Attack Detection) 설계 (A Design of ETWAD(Encapsulation and Tunneling Wormhole Attack Detection) based on Positional Information and Hop Counts on Ad-Hoc)

  • 이병관;정은희
    • 한국컴퓨터정보학회논문지
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    • 제17권11호
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    • pp.73-81
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    • 2012
  • 본 논문에서는 애드 혹 네트워크의 노드 위치 정보와 홉 수를 이용하여 캡슐화 웜홀 공격과 터널링 웜홀 공격을 탐지하는 ETWAD(Encapsulation and Tunneling Wormhole Attack Detection) 기법을 설계하였다. ETWAD 탐지 기법은 애드 혹 네트워크 내의 노드 ID와 그룹 키로 노드의 신분을 확인할 수 있는 GAK(Group Authentication Key)를 생성하여 RREQ와 RREP에 추가하여 애드 혹 네트워크의 구성원임으로 인증할 수 있도록 설계하였다. 또한, ETWAD 탐지 기법은 RREP 메시지 내의 홉 수를 카운트하고, 근원지 노드 S와 목적지 노드 D의 거리를 계산하여 임계치와 홉 수를 이용하여 캡슐화 웜홀 공격, 터널링 공격을 탐지하는 GeoWAD 알고리즘을 설계하였다. 그 결과, 평균 웜홀 공격 탐지율이 91%, 평균 FPR이 4.4%로 평가되므로 ETWAD 탐지 기법은 웜홀 공격 탐지율과 웜홀 공격 탐지의 신뢰성을 향상시켰다고 볼 수 있다.

Electron Tunneling and Electrochemical Currents through Interfacial Water Inside an STM Junction

  • Song, Moon-Bong;Jang, Jai-Man;Lee, Chi-Woo
    • Bulletin of the Korean Chemical Society
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    • 제23권1호
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    • pp.71-74
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    • 2002
  • The apparent barrier height for charge transfer through an interfacial water layer between a Pt/Ir tip and a gold surface has been measured using STM technique. The average thickness of the interfacial water layer inside an STM junction was controlled by the amount of moisture. A thin water layer on the surface was formed when relative humidity was in the range of 10 to 80%. In such a case, electron tunneling through the thin water layer became the majority of charge transfers. The value of the barrier height for the electron tunneling was determined to be 0.95 eV from the current vs. distance curve, which was independent of the tip-sample distance. On the other hand, the apparent barrier height for charge transfer showed a dependence on tip-sample distance in the bias range of 0.1-0.5 V at a relative humidity of approximately 96%. The non-exponentiality for current decay under these conditions has been explained in terms of electron tunneling and electrochemical processes. In addition, the plateau current was observed at a large tip-sample distance, which was caused by electrochemical processes and was dependent on the applied voltage.

Characteristics of Si Nano-Crystal Memory

  • Kwangseok Han;Kim, Ilgweon;Hyungcheol Shin
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제1권1호
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    • pp.40-49
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    • 2001
  • We have developed a repeatable process of forming uniform, small-size and high-density self-assembled Si nano-crystals. The Si nano-crystals were fabricated in a conventional LPCVD (low pressure chemical vapor deposition) reactor at $620^{\circ}c$ for 15 sec. The nano-crystals were spherical shaped with about 4.5 nm in diameter and density of $5{\times}l0^{11}/$\textrm{cm}^2$. More uniform dots were fabricated on nitride film than on oxide film. To take advantage of the above-mentioned characteristics of nitride film while keeping the high interface quality between the tunneling dielectrics and the Si substrate, nitride-oxide tunneling dielectrics is proposed in n-channel device. For the first time, the single electron effect at room temperature, which shows a saturation of threshold voltage in a range of gate voltages with a periodicity of ${\Delta}V_{GS}\;{\approx}\;1.7{\;}V$, corresponding to single and multiple electron storage is reported. The feasibility of p-channel nano-crystal memory with thin oxide in direct tunneling regime is demonstrated. The programming mechanisms of p-channel nano-crystal memory were investigated by charge separation technique. For small gate programming voltage, hole tunneling component from inversion layer is dominant. However, valence band electron tunneling component from the valence band in the nano-crystal becomes dominant for large gate voltage. Finally, the comparison of retention between programmed holes and electrons shows that holes have longer retention time.

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System dynamics of scanning tunneling microscope unit

  • Yamada, Hikaru;Endo, Toshiro;Tsunetaka-Sumomogi;Fujita, Toshizo;Morita, Seizo
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 1988년도 한국자동제어학술회의논문집(국제학술편); 한국전력공사연수원, 서울; 21-22 Oct. 1988
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    • pp.794-797
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    • 1988
  • G. Binnig and H. Rohrer introduced the Scanning Tunneling Microscope (STM) in 1982 and developed it into a powerful and not to be missed physical tool. Scanning tunneling Microscopy is a real space surface imaging method with the atomic or subatomic resolution in all three dimensions. The tip is scanned over the surface by two piezo translators mounted parallel (X-piezo and Y-piezo) to the surface and perpendicular to each other. The voltage applied to the third piezo (Z-piezo) translator mounted perpendicular to the surface to maintain the tunneling current through the gap at a constant level reflects then the topography of the surface. The feed back control loop for the constant gap current is designed using the automatic control technique. In the designing process of the feed back loop, the identification of the gap dynamics is very complex and has difficulty. In this research, using some suitable test signals, the system dynamics of the gap including the Z-piezo are investigated. Especially, in this paper, a system model is proposed for the gap and Z-piezo series system. Indicial response is used to find out the model. The driving voltage of the Z-piezo and the tunneling current are considered as input and output signals respectively.

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