• Title/Summary/Keyword: Transparent Thin Film Transistors

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A Study on Indium Gallium Oxide Thin Film Transistors prepared by a Solution-based Deposition Method (저온 용액공정을 이용한 인듐갈륨 산화물(IGO) 박막트랜지스터 제조 및 특성 연구)

  • Bae, Eunjin;Lee, Jin Young;Han, Seung-Yeol;Chang, Chih-Hung;Ryu, Si Ok
    • Korean Chemical Engineering Research
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    • v.49 no.5
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    • pp.600-604
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    • 2011
  • Solution processed IGO thin films were prepared using a general chemical solution route by spin coating. The effect of the annealing temperature of IGO thin films based on the ratio of 2:1 of indium to gallium on crystallization was investigated with varying annealing temperature from $300^{\circ}C$ to $600^{\circ}C$. The electronic device characteristic of IGO thin film was investigated. The solution-processed IGO TFTs annealed at 300 and $600^{\circ}C$ in air for 1 h exhibited good electronic performances with field effect mobilities as high as 0.34 and 3.83 $cm^2/V{\cdot}s$, respectively. The on/off ratio of the IGO TFT in this work was $10^5$ with 98% transmittance.

Fabrication of IGZO-based Oxide TFTs by Electron-assisted Sputtering Process

  • Yun, Yeong-Jun;Jo, Seong-Hwan;Kim, Chang-Yeol;Nam, Sang-Hun;Lee, Hak-Min;O, Jong-Seok;Kim, Yong-Hwan
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.273.2-273.2
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    • 2014
  • Sputtering process has been widely used in Si-based semiconductor industry and it is also an ideal method to deposit transparent oxide materials for thin-film transistors (TFTs). The oxide films grown at low temperature by conventional RF sputtering process are typically amorphous state with low density including a large number of defects such as dangling bonds and oxygen vacancies. Those play a crucial role in the electron conduction in transparent electrode, while those are the origin of instability of semiconducting channel in oxide TFTs due to electron trapping. Therefore, post treatments such as high temperature annealing process have been commonly progressed to obtain high reliability and good stability. In this work, the scheme of electron-assisted RF sputtering process for high quality transparent oxide films was suggested. Through the additional electron supply into the plasma during sputtering process, the working pressure could be kept below $5{\times}10-4Torr$. Therefore, both the mean free path and the mobility of sputtered atoms were increased and the well ordered and the highly dense microstructure could be obtained compared to those of conventional sputtering condition. In this work, the physical properties of transparent oxide films such as conducting indium tin oxide and semiconducting indium gallium zinc oxide films grown by electron-assisted sputtering process will be discussed in detail. Those films showed the high conductivity and the high mobility without additional post annealing process. In addition, oxide TFT characteristics based on IGZO channel and ITO electrode will be shown.

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Advances in Zinc Oxide-Based Devices for Active Matrix Displays

  • Mann, Mark;Li, Flora;Kiani, Ahmed;Paul, Debjani;Flewitt, Andrew;Milne, William;Dutson, James;Wakeham, Steve J.;Thwaites, Mike
    • 한국정보디스플레이학회:학술대회논문집
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    • 2009.10a
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    • pp.389-392
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    • 2009
  • Metal oxides have been proposed as an alternative channel material to hydrogenated amorphous silicon in thin film transistors (TFTs) because their higher mobility and stability make them suitable for transistor active layers. Thin films of indium zinc oxide (IZO) were deposited using a High Target Utilization Sputtering (HiTUS) system on various dielectrics, some of which were also deposited with the HiTUS. Investigations into bottom-gated IZO TFTs have found mobilities of 8 $cm^2V\;^1s^{-1}$ and switching ratios of $10^6$. There is a variation in the threshold voltage dependent on both oxygen concentration, and dielectric choice. Silica, alumina and silicon nitride produced stable TFTs, whilst hafnia was found to break down as a result of the IZO.

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Effects of oxygen and hydrogen additives on electrical, optical, and structural properties of ZnO films (수소 및 산소 첨가에 따른 산화아연막의 전기적, 광학적, 구조적 물성)

  • Bang, Jung-Hwan;Kim, Won;Uhm, Hyun-Seok;Park, Jin-Seok
    • Proceedings of the KIEE Conference
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    • 2009.07a
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    • pp.1246_1247
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    • 2009
  • Effects of hydrogen and oxygen additives on structural, optical, and electrical properties of ZnO films were extensively examined. ZnO films were deposited using RF sputtering by varying the gas mixing ratio of $H_2$ and $O_2$. Optical transmittances at visible region, electrical resistivities, and micro-structures of ZnO films were characterized in terms of the kind and amount of additive gases. It was observed that the material properties of ZnO films required for their use in transparent thin film transistors, such as approximately $10^3{\Omega}cm$ in resistivity and higher than 85% in transmittance, can be achieved by controlling the gas mixing ratio of $O_2/H_2$ (sccm) in the range of 2/2~2/8.

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Organic Thin-Film Transistors Fabricated on Flexible Substrate by Using Nanotransfer Molding

  • Hwang, Jae-Kwon;Dang, Jeong-Mi;Sung, Myung-Mo
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.08a
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    • pp.287-287
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    • 2010
  • We report a new direct patterning method, called liquid bridge-mediated nanotransfer molding (LB-nTM), for the formation of two- or three-dimensional structures with feature sizes between tens of nanometers and tens of micron over large areas. LB-nTM is based on the direct transfer of various materials from a mold to a substrate via a liquid bridge between them. This procedure can be adopted for automated direct printing machines that generate patterns of functional materials with a wide range of feature sizes on diverse substrates. Arrays of TIPS-PEN TFTs were fabricated on 4" polyethersulfone (PES) substrates by LB-nTM using PDMS molds. An inverted staggered structure was employed in the TFT device fabrication. A 150 nm-thick indium-tin oxide (ITO) gate electrode and a 200 nm-thick SiO2dielectric layer were formed on a PES substrate by sputter deposition. An array of TIPS-PEN patterns (thickness: 60 nm) as active channel layers was fabricated on the substrate by LB-nTM. The nominal channel length of the TIPS-PEN TFT was 10 mm, while the channel width was 135 mm. Finally, the source and drain electrodes of 200 nm-thick Ag were defined on the substrate by LB-nTM. The TIPS-PEN TFTs can endure strenuous bending and are also transparent in the visible range, and therefore potentially useful for flexible and invisible electronics.

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Electrical Characteristics of a-GIZO TFT by RF Sputtering System for Transparent Display Application

  • Lee, Se-Won;Jeong, Hong-Bae;Lee, Yeong-Hui;Jo, Won-Ju
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.02a
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    • pp.100-100
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    • 2011
  • 2004년 일본의 Hosono 그룹에 의해 처음 발표된 이래로, amorphous gallium-indium-zinc oxide (a-GIZO) thin film transistors (TFTs)는 높은 이동도와 뛰어난 전기적, 광학적 특성에 의해 큰 주목을 받고 있다. 또한 넓은 밴드갭을 가지므로 가시광 영역에서 투명한 특성을 보이고, 플라스틱 기판 위에서 구부러지는 성질에 의해 플랫 패널 디스플레이나 능동 유기 발광 소자(AM-OLED), 투명 디스플레이에 응용될 뿐만 아니라, 일반적인 Poly-Si TFT에 비해 백플레인의 대면적화에 유리하다는 장점이 있다. 최근에는 Y2O3나 ZrO2 등의 high-k 물질을 gate insulator로 이용하여 높은 캐패시턴스를 유지함과 동시에 낮은 구동 전압과 빠른 스위칭 특성을 가지는 a-GIZO TFT의 연구 결과가 보고되었다. 하지만 투명 디스플레이 소자 제작을 위해 플라스틱이나 유리 기판을 사용할 경우, 기판 특성상 공정 온도에 제약이 따르고(약 $300^{\circ}C$ 이하), 이를 극복하기 위한 부가적인 기술이 필수적이다. 본 연구에서는 p-type Si을 back gate로 하는 Inverted-staggered 구조의 a-GIZO TFT소자를 제작 하였다. p-type Si (100) 기판위에 RF magnetron sputtering을 이용하여 Gate insulator를 증착하고, 같은 방법으로 채널층인 a-GIZO를 70 nm 증착하였다. a-GIZO를 증착하기 위한 sputtering 조건으로는 100W의 RF power와 6 mTorr의 working pressure, 30 sccm Ar 분위기에서 증착하였다. 소스/드레인 전극은 e-beam evaporation을 이용하여 Al을 150 nm 증착하였다. 채널 폭은 80 um 이고, 채널 길이는 각각 20 um, 10 um, 5 um, 2 um이다. 마지막으로 Furnace를 이용하여 N2 분위기에서 $500^{\circ}C$로 30분간 후속 열처리를 실시한 후에, 전기적 특성을 분석하였다.

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Effects of thickness of GIZO active layer on device performance in oxide thin-film-transistors

  • Woo, C.H.;Jang, G.J.;Kim, Y.H.;Kong, B.H.;Cho, H.K.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.06a
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    • pp.137-137
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    • 2009
  • Thin-film transistors (TFTs) that can be prepared at low temperatures have attracted much attention due to the great potential for flexible electronics. One of the mainstreams in this field is the use of organic semiconductors such as pentacene. But device performance of the organic TFTs is still limited by low field effect mobility or rapidly degraded after exposing to air in many cases. Another approach is amorphous oxide semiconductors. Amorphous oxide semiconductors (AOSs) have exactly attracted considerable attention because AOSs were fabricated at room temperature and used lots of application such as flexible display, electronic paper, large solar cells. Among the various AOSs, a-IGZO was considerable material because it has high mobility and uniform surface and good transparent. The high mobility is attributed to the result of the overlap of spherical s-orbital of the heavy pest-transition metal cations. This study is demonstrated the effect of thickness channel layer from 30nm to 200nm. when the thickness was increased, turn on voltage and subthreshold swing were decreased. a-IGZO TFTs have used a shadow mask to deposit channel and source/drain(S/D). a-IGZO were deposited on SiO2 wafer by rf magnetron sputtering. using power is 150W, working pressure is 3m Torr, and an O2/Ar(2/28 SCCM) atmosphere at room temperature. The electrodes were formed with Electron-beam evaporated Ti(30nm) and Au(70nm) structure. Finally, Al(150nm) as a gate metal was evaporated. TFT devices were heat treated in a furnace at $250^{\circ}C$ in nitrogen atmosphere for an hour. The electrical properties of the TFTs were measured using a probe-station to measure I-V characteristic. TFT whose thickness was 150nm exhibits a good subthreshold swing(S) of 0.72 V/decade and high on-off ratio of 1E+08. Field effect mobility, saturation effect mobility, and threshold voltage were evaluated 7.2, 5.8, 8V respectively.

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Electrical Characteristic of IGZO Oxide TFTs with 3 Layer Gate Insulator

  • Lim, Sang Chul;Koo, Jae Bon;Park, Chan Woo;Jung, Soon-Won;Na, Bock Soon;Lee, Sang Seok;Cho, Kyoung Ik;Chu, Hye Yong
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.344-344
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    • 2014
  • Transparent amorphous oxide semiconductors such as a In-Ga-Zn-O (a-IGZO) have advantages for large area electronic devices; e.g., uniform deposition at a large area, optical transparency, a smooth surface, and large electron mobility >10 cm2/Vs, which is more than an order of magnitude larger than that of hydrogen amorphous silicon (a-Si;H).1) Thin film transistors (TFTs) that employ amorphous oxide semiconductors such as ZnO, In-Ga-Zn-O, or Hf-In-Zn-O (HIZO) are currently subject of intensive study owing to their high potential for application in flat panel displays. The device fabrication process involves a series of thin film deposition and photolithographic patterning steps. In order to minimize contamination, the substrates usually undergo a cleaning procedure using deionized water, before and after the growth of thin films by sputtering methods. The devices structure were fabricated top-contact gate TFTs using the a-IGZO films on the plastic substrates. The channel width and length were 80 and 20 um, respectively. The source and drain electrode regions were defined by photolithography and wet etching process. The electrodes consisting of Ti(15 nm)/Al(120 nm)/Ti(15nm) trilayers were deposited by direct current sputtering. The 30 nm thickness active IGZO layer deposited by rf magnetron sputtering at room temperature. The deposition condition is as follows: a rf power 200 W, a pressure of 5 mtorr, 10% of oxygen [O2/(O2+Ar)=0.1], and room temperature. A 9-nm-thick Al2O3 layer was formed as a first, third gate insulator by ALD deposition. A 290-nm-thick SS6908 organic dielectrics formed as second gate insulator by spin-coating. The schematic structure of the IGZO TFT is top gate contact geometry device structure for typical TFTs fabricated in this study. Drain current (IDS) versus drain-source voltage (VDS) output characteristics curve of a IGZO TFTs fabricated using the 3-layer gate insulator on a plastic substrate and log(IDS)-gate voltage (VG) characteristics for typical IGZO TFTs. The TFTs device has a channel width (W) of $80{\mu}m$ and a channel length (L) of $20{\mu}m$. The IDS-VDS curves showed well-defined transistor characteristics with saturation effects at VG>-10 V and VDS>-20 V for the inkjet printing IGZO device. The carrier charge mobility was determined to be 15.18 cm^2 V-1s-1 with FET threshold voltage of -3 V and on/off current ratio 10^9.

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열처리 온도에 따른 자외선 발광다이오드용 산화물/금속/산화물 투명전극의 전기적/광학적 특성

  • Lee, Jae-Hun;Kim, Gyeong-Heon;An, Ho-Myeong;Kim, Tae-Geun
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.418-419
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    • 2013
  • 현재, 인듐 주석 산화물(indium tin oxide, ITO) 박막은 가시영역에서 전기적 특성 및 광학적 특성이 우수하기 때문에 평면 디스플레이(flat displays), 박막 트랜지스터(thin film transistors), 태양전지(solar cells) 등을 포함한 광소자에 투명전도성산화물(transparent conducting oxide, TCO) 전극으로 가장 일반적으로 사용되고 있다. 하지만, 이 물질은 밴드갭이 3.4 eV로 다소 작아 다양한 분야의 의료기기, 환경 보호에 응용 가능한 자외선 영역에서 상당히 많은 양의 광흡수가 발생하는 치명적인 문제점을 가지고 있다. 또한, 인듐(Indium)의 급속한 소비는 인듐의 매장량의 한계로 인해 가격을 상승시키는 주요한 원인으로 작용하고 있다. 한편, InGaN 기반의 자외선 발광다이오드 분야에서는 팔라듐(Pd) 기반의 반투명 전극과 은(Ag) 기반의 반사전극을 주로 사용하고 있지만, 낮은 투과도와 낮은 굴절률을 때문에 여전히 자외선 발광다이오드의 광추출 효율(extraction efficiency)에 문제점을 가지고 있다. 따라서 자외선 발광다이오드의 외부양자 효율(external quantum efficiency, EQE)을 높이기 위해 높은 투과도와 GaN와 유사한 굴절률을 가지는 p-형 오믹 전극을 개발해야 한다. 본 연구에서는 초박막의 ITO (16 nm)/Ag (7 nm)/ITO (16 nm) 다층 구조를 갖는 투명전도성 전극을 제작한 후, 열처리 온도에 따른 전기, 광학적 특성에 향상에 대해서 조사하였다. 사용된 산화물/금속/산화물 전극의 구조는 유기발광 다이오드(organic light emitting diode, OLED), 태양전지 등에 많이 사용되는 안정적인 투명 전극을 자외선 LED 소자에 처음 적용하여, ITO의 전체 사용량은 줄이고, ITO 사이에 금속을 삽임함으로써 금속에 의한 전기적 특성 향상과 플라즈몬 효과에 의한 투과도를 높일 수 있는 장점을 가지고 있다. 실험 결과로는, $400^{\circ}C$에서 열처리한 ITO/Ag/ITO 다층 구조는 365 nm에서 84%의 광학적 특성과 9.644 omh/sq의 전기적 특성을 확인하였다. 실험 결과로부터 좀 더 최적화를 수행하면, ITO/Ag/ITO 다층 구조는 자외선 발광다이오드의 투명전도성 전극으로 사용될 수 있을 것이라 기대된다.

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Influence of gate insulator treatment on Zinc Oxide thin film transistors.

  • Kim, Gyeong-Taek;Park, Jong-Wan;Mun, Yeon-Geon;Kim, Ung-Seon;Sin, Sae-Yeong
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2010.05a
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    • pp.54.2-54.2
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    • 2010
  • 최근까지는 주로 비정질 실리콘이 디스플레이의 채널층으로 상용화 되어왔다. 비정질 실리콘 기반의 박막 트랜지스터는 제작의 경제성 및 균일성을 가지고 있어서 널리 상용화되고 있다. 하지만 비정질 실리콘의 구조적인 문제인 낮은 전자 이동도(< $1\;cm^2/Vs$)로 인하여 디스플레이의 대면적화에 부적합하며, 광학적으로 불투명한 특성을 갖기 때문에 차세대 디스플레이의 응용에 불리한 점이 있다. 이런 문제점의 대안으로 현재 국내외 여러 연구 그룹에서 산화물 기반의 반도체를 박막 트랜지스터의 채널층으로 사용하려는 연구가 진행중이다. 산화물 기반의 반도체는 밴드갭이 넓어서 광학적으로 투명하고, 상온에서 증착이 가능하며, 비정질 실리콘에 비해 월등히 우수한 이동도를 가짐으로 디스플레이의 대면적화에 유리하다. 특히 Zinc Oxide의 경우, band gap이 3.4eV로써, transparent conductors, varistors, surface acoustic waves, gas sensors, piezoelectric transducers 그리고 UV detectors 등의 많은 응용에 쓰이고 있다. 또한, a-Si TFTs에 비해 ZnO-based TFTs의 경우 우수한 소자 성능과 신뢰성을 나타내며, 대면적 제조시 우수한 균일성 및 낮은 생산비용이 장점이다. 그러나 ZnO-baesd TFTs의 경우 일정한 bias 아래에서 threshold voltage가 이동하는 문제점이 displays의 소자로 적용하는데 매우 중요하고 문제점으로 여겨진다. 특히 gate insulator와 channel layer사이의 interface에서의 defect에 의한 charge trapping이 이러한 문제점들을 야기한다고 보고되어진다. 본 연구에서는 Zinc Oxide 기반의 박막 트랜지스터를 DC magnetron sputtering을 이용하여 상온에서 제작을 하였다. 또한, $Si_3N_4$ 기판 위에 electron cyclotron resonance (ECR) $O_2$ plasma 처리와 plasma-enhanced chemical vapor deposition (PECVD)를 통하여 $SiO_2$ 를 10nm 증착을 하여 interface의 개선을 시도하였다. 그리고 TFTs 소자의 출력 특성 및 전이 특성을 평가를 하였고, 소자의 field effect mobility의 값이 향상을 하였다. 또한 Temperature, Bias Temperature stability의 조건에서 안정성을 평가를 하였다. 이러한 interface treatment는 안정성의 향상을 시킴으로써 대면적 디스플레의 적용에 비정질 실리콘을 대체할 유력한 물질이라고 생각된다.

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