• Advances in materials Research
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• v.12 no.3
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• pp.243-261
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• 2023

This study aims to analyze the mechanical buckling behavior of a single-walled carbon nanotube (SWCNT) integrated with a one-parameter elastic medium and modeled as a Kerr-type foundation under a longitudinal magnetic field. The structure is considered homogeneous and therefore modeled utilizing the nonlocal first shear deformation theory (NL-FSDT). This model targets thin and thick structures and considers the effect of the transverse shear deformation and small-scale effect. The Kerr model describes the elastic matrix, which takes into account the transverse shear strain and normal pressure. Using the nonlocal elastic theory and taking into account the Lorentz magnetic force acquired from Maxwell relations, the stability equation for buckling analysis of a simply supported SWCNT under a longitudinal magnetic field is obtained. Moreover, the mechanical buckling load behavior with respect to the impacts of the magnetic field and the elastic medium parameters considering the nonlocal parameter, the rotary inertia, and transverse shear deformation was examined and discussed. This study showed useful results that can be used for the design of nano-transistors that use the buckling properties of single-wall carbon nanotubes(CNTs) due to the creation of the magnetic field effect.

• Journal of Adhesion and Interface
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• v.24 no.2
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• pp.60-63
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• 2023

The AlGaN/GaN heterostructure has high electron mobility due to the two-dimensional electron gas (2-DEG) layer, and has the characteristic of high breakdown voltage at high temperature due to its wide bandgap, making it a promising candidate for high-power and high-frequency electronic devices. Despite these advantages, there are factors that affect the reliability of various device properties such as current collapse. To address this issue, this paper used metal-organic chemical vapor deposition to continuously deposit AlGaN/GaN heterostructure and SiN passivation layer. Material and electrical properties of GaN HEMTs with/without SiN cap layer were analyzed, and based on the results, low-frequency noise characteristics of GaN HEMTs were measured to analyze the conduction mechanism model and the cause of defects within the channel.

• The Journal of the Korea institute of electronic communication sciences
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• v.18 no.4
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• pp.641-648
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• 2023

Recently, the rapid growth of artificial intelligence among the 4th industrial revolution has progressed based on the performance improvement of semiconductor, and circuit integration. According to transistors, which help operation of internal electronic devices and equipment that have been progressed to be more complicated and miniaturized, the control of heat generation and improvement of heat dissipation efficiency have emerged as new performance indicators. The DUT(Device Under Test) Shell is equipment which detects malfunction transistor by evaluating the durability of transistor through heat dissipation in a state where the power is cut off at an arbitrary heating point applying the rating current to inspect the transistor. Since the DUT shell can test more transistor at the same time according to the heat dissipation structure inside the equipment, the heat dissipation efficiency has a direct relationship with the malfunction transistor detection efficiency. Thus, in this paper, we propose various method for PCB configuration structure to optimize heat dissipation of DUT shell and we also propose various transformation and thermal analysis of optimal DUT shell using computational fluid dynamics.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.36 no.2
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• pp.143-150
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• 2023

Underwater wireless communication is a challenging issue for realizing the smart aqua-farm and various marine activities for exploring the ocean and environmental monitoring. In comparison to acoustic and radio frequency technologies, the visible light communication is the most promising method to transmit data with a higher speed in complex underwater environments. To send data at a speedier rate, high-performance photodetectors are essentially required to receive blue and/or cyan-blue light that are transmitted from the light sources in a light-fidelity (Li-Fi) system. Here, we fabricated high-performance organic phototransistors (OPTs) based on P-type donor polymer (PTO2) and N-type acceptor small molecule (IT-4F) blend semiconductors. Bulk-heterojunction (BHJ) PTO2:IT-4F photo-active layer has a broad absorption spectrum in the range of 450~550 nm wavelength. Solution-processed OPTs showed a high photo-responsivity >1,000 mA/W, a large photo-sensitivity >10³, a fast response time, and reproducible light-On/Off switching characteristics even under a weak incident light. BHJ organic semiconductors absorbed photons and generated excitons, and efficiently dissociated to electron and hole carriers at the donor-acceptor interface. Printed and flexible OPTs can be widely used as Li-Fi receivers and image sensors for underwater communication and underwater internet of things (UIoTs).

• Asia-pacific Journal of Multimedia Services Convergent with Art, Humanities, and Sociology
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• v.7 no.3
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• pp.291-300
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• 2017

Quantum-dot cellular automata(QCA) is a computing model designed to be similar to cellular automata, and an alternative technology for next generation using high performance and low power consumption. QCA is undergoing various studies with recent experimental results, and it is one of the paradigms of transistors that can solve device density and interconnection problems as nano-unit materials. An XOR gate is a gate that operates so that the result is true when either one of the logic is true. The proposed XOR gate consists of five layers. The first layer consists of OR gates, the third and fifth layers consist of AND gates, and the second and fourth layers are designed as passages in the middle. The half adder consists of an XOR gate and an AND gate. The proposed half adder is designed by adding two cells to the proposed XOR gate. The proposed half adder consists of fewer cells, total area, and clock than the conventional half adder.

• Advances in nano research
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• v.12 no.1
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• pp.25-35
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• 2022

Within the framework of the density functional theory combined with the method of non-equilibrium Green's functions (DFT + NEGF), the features of electron transport in fullerene nanojunctions, which are «core-shell» nanoobjects made of a combination of fullerenes of different diameters C₂₀, C₈₀, C₁₈₀, placed between gold electrodes (in a nanogap), are studied. Their transmission spectra, the density of state, current-voltage characteristics and differential conductivity are determined. It was shown that in the energy range of -0.45-0.45 eV in the transmission spectrum of the "Au-C₁₈₀-Au" nanojunction appears a HOMO-LUMO gap with a width of 0.9 eV; when small-sized fullerenes C₂₀, C₈₀ are intercalation into the cavity C₁₈₀ the gap disappears, and a series of resonant structures are observed on their spectra. It has been established that distinct Coulomb steps appear on the current-voltage characteristics of the "Au-C₁₈₀-Au" nanojunction, but on the current-voltage characteristics "Au-C₈₀@C₁₈₀-Au", "Au-(C₂₀@C₈₀)@C₁₈₀-Au" these step structures are blurred due to a decrease in Coulomb energy. An increase in the number of Coulomb features on the dI/dV spectra of core-shell fullerene nanojunctions was revealed in comparison with nanojunctions based on fullerene C₆₀, which makes it possible to create high-speed single-electron devices on their basis. Models of single-electron transistors (SET) based on fullerene nanojunctions "Au-C₁₈₀-Au", "Au-C₈₀@C₁₈₀-Au" and "Au-(C₂₀@C₈₀)@C₁₈₀-Au" are considered. Their charge stability diagrams are analyzed and it is shown that SET based on C₈₀@C₁₈₀-, (C₂₀@C₈₀)@C₁₈₀- nanojunctions is output from the Coulomb blockade mode with the lowest drain-to-source voltage.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.37 no.1
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• pp.101-105
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• 2024

4H-SiC power metal-oxide-semiconductor field effect transistors (MOSFETs) have been developed to achieve lower specific-on-resistance (R_on,sp), and the gate oxides have been thermally grown. The poor channel mobility resulting from the high interface trap density (D_it) at the SiO₂/4H-SiC interface significantly affects the higher switching loss of the power device. Therefore, the development of novel fabrication processes to enhance the quality of the SiO₂/4H-SiC interface is required. In this paper, NO post-oxidation annealing (POA) by using the conditions of N₂ diluted NO at a high temperature (1,300℃) is proposed to reduce the high interface trap density resulting from thermal oxidation. The NO POA is carried out in various NO ambient (0, 10, 50, and 100% NO mixed with 100, 90, 50, and 0% of high purity N₂ gas to achieve the optimized condition while maintaining a high temperature (1,300℃). To confirm the optimized condition of the NO POA, measuring capacitance-voltage (C-V) and current-voltage (I-V), and time-of-flight secondary-ion mass spectrometry (ToF-SIMS) are employed. It is confirmed that the POA condition of 50% NO at 1,300℃ facilitates the equilibrium state of both the oxidation and nitridation at the SiO₂/4H-SiC interface, thereby reducing the D_it.

• Applied Chemistry for Engineering
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• v.35 no.1
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• pp.61-65
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• 2024

The effectiveness of CuSCN as a hole injection layer in large-area organic light-emitting diodes, organic solar cells, and thin-film transistors has been well demonstrated. Therefore, in this study, the surface, optical, and electrical analyses of CuSCN were carried out according to the solution process conditions in order to propose optimized film conditions. Various CuSCN solution concentrations were prepared to determine the film surface characteristics and to determine whether the film surface affects the electrical performance of the device. When the CuSCN solution concentration was low, the CuSCN film was not formed and coated in the form of islands, and when the solution concentration was increased, the CuSCN film was formed uniformly, which contributed to improving the conductivity of the device. In addition, a hole-only device was fabricated to demonstrate the role of CuSCN as a hole transport layer.

• Journal of IKEEE
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• v.28 no.1
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• pp.78-89
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• 2024

PMIC chips based on a BCD process used in automotive semiconductors require multi-time programmable (MTP) intellectual property (IP) that does not require additional masks to trim analog circuits. In this paper, MTP cell size was reduced by about 18.4% by using MTP cells using PMOS capacitors (PCAPs) instead of NMOS capacitors (NCAPs) in MTP cells, which are single poly EEPROM cells with two transistors and one MOS capacitor for small-area MTP IP design. In addition, from the perspective of MTP IP circuit design, the two-stage voltage shifter circuit is applied to the CG drive circuit and TG drive circuit of MTP IP design, and in order to reduce the area of the DC-DC converter circuit, the VPP (=7.75V), VNN (=-7.75V) and VNNL (=-2.5V) charge pump circuits using the charge pumping method are placed separately for each charge pump.

• Journal of the Semiconductor & Display Technology
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• v.23 no.2
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• pp.1-5
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• 2024

In the electronics industry, a lot of research and development is being conducted on electronic component supply, component alignment and insertion, and automation of soldering on the back side of the PCB for automatic PCB assembly. Additionally, as the use of electronic components increases in the automotive component field, there is a growing need to automate the alignment and insertion of components with leads such as transistors, coils, and fuses on PCB. In response to these demands, the types of PCB and parts used have been more various, and as this industrial trend, the quantity and placement of automation equipment that supplies, aligns, inserts, and solders components has become important in PCB manufacturing plants. It is also necessary to reduce the pre-setting time before using each automation equipment. In this study, we propose a method in which a vision system recognizes the type of component and simultaneously corrects alignment errors during the process of aligning and inserting various types of electronic components. The proposed method is effective in manufacturing various types of PCBs by minimizing the amount of automatic equipment inserted after alignment with the component supply device and omitting the preset process depending on the type of component supplied. Also the advantage of the proposed method is that the structure of the existing automatic insertion machine can be easily modified and utilized without major changes.